Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

4.10 SEQUENTIAL STATEMENTS

Sequential VHDL statements allow the designer to describe the operation, or behavior, of a circuit as a sequence of related events. Sequential statements are found within processes, functions, and procedures. Sequential statements differ from concurrent statements in that they have order dependency, which may or may not imply a sequential circuit (one involving memory elements). VHDL's process statement is the primary way to enter a sequential statement. A process statement, including all declarations and sequential statements within it, is actually a single concurrent statement within a VHDL architecture. This means that the designer can write as many processes and other concurrent statements as are necessary to describe a design, without worrying about the order in which the simulator will process each statement. Thus, the process statement constitutes the behavioral statement in VHDL. The example in Figure 4.23 illustrates the general structure of the process statement.

A process statement is listed in the architecture declaration. The process statement begins with the reserved keyword process, following the begin statement of the architecture. The process statement includes a begin statement inside it as well. The process statement concludes with an end process statement. The process may have a label, which also appears at the close of the process statement. The process statement structure is composed of a declaration section and a statement section. ...