Addition is the most commonly performed arithmetic operation in digital systems. An adder is a digital circuit that adds two N-bit numbers and generates an N-bit number. The adder circuit could also generate an overflow indication bit. The same adder circuit is used to combine two arithmetic operands, which can be unsigned or two's-complement numbers. Therefore, an adder can perform subtraction as the addition of the minuend and the complemented subtrahend. Direct implementation of an N-bit adder would be very complex and not scalable. Each time the size of the adder is changed, a new implementation must be designed. A simpler approach would be to build an N-bit adder from smaller module circuits, which can be duplicated and expanded as the size of the adder increases. The process of adding two N-bit numbers can be accomplished by a sequence of N simple 1-bit addition operations. In the following sections, several arithmetic circuit modules, which can be used to build larger arithmetic circuits, are described.

7.9.1 Half-Adder

A 1-bit half-adder adds two 1-bit operands, x and y and produces a 2-bit result. The result can range from 0 to 2, which requires 2 bits to represent. The low-order bit of the sum is referred to as s (sum) and the high-order bit as cout (carryout). The truth table and the optimized logic expressions of the 1-bit half-adder are illustrated in Figure 7.27. The logic implementation of a 1-bit half-adder is shown in Figure 7.28. A 1-bit ...

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