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On-Chip Communication Architectures by Nikil Dutt, Sudeep Pasricha

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Chapter 13. Emerging On-Chip Interconnect Technologies

The previous chapters have reiterated the overall trend toward communication-centric design: while individual computation logic components have become considerably faster, the overall speed of system-on-chip (SoC) designs is limited by the communication between the different components on a chip. In deep submicron (DSM) VLSI technologies, it is becoming increasingly harder for a copper-based electrical interconnect (EI) to satisfy the design requirements of delay, power, bandwidth, and delay uncertainty [1]. Indeed, the situation is likely to become worse for future giga- and tera-scale electronic systems. The resistance of copper interconnects, in current and imminent technologies is increasing ...

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