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PC Hardware in a Nutshell, 3rd Edition by Barbara Fritchman Thompson, Robert Bruce Thompson

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The ATA Interface

Table 13-4 lists the pins and signal names for the ATA interface. Signal names that end with # are active-low. Signal names contained in square brackets are specific to the secondary ATA interface.

Table 13-4. ATA interface pinout and signal definitions

Pin

Signal

Pin

Signal

1

Reset IDE

2

Ground

3

Data 7

4

Data 8

5

Data 6

6

Data 9

7

Data 5

8

Data 10

9

Data 4

10

Data 11

11

Data 3

12

Data 12

13

Data 2

14

Data 13

15

Data 1

16

Data 14

17

Data 0

18

Data 15

19

Ground

20

Key (no pin)

21

DDRQ0 [DDRQ1]

22

Ground

23

I/O Write#

24

Ground

25

I/O Read#

26

Ground

27

IOCHRDY

28

P_ALE (CSEL pull-up)

29

DDACK0# [DDACK1#]

30

Ground

31

IRQ 14 [IRQ 15]

32

(reserved)

33

DAG1 (Address 1)

34

GPIO_DMA66_Detect_Pri [GPIO_DMA66_Detect_Sec]

35

DAG0 (Address 0)

36

DAG2 (Address 2)

37

Chip Select 1P# [Chip Select 1S#]

38

Chip Select 3P# [Chip Select 3S#]

39

Activity#

40

Ground

41

+5VDC (logic)

42

+5VDC (motor)

43

Ground

44

-TYPE (0=ATA)

The standard ATA interface used in desktop systems uses only pins 1 through 40. Pins 41 through 44 are implemented only in notebook ATA interfaces, for use with 2.5-inch and smaller drives. The additional four pins provide power and ground to the drives, which are not large enough to accept a standard power connector.

Tip

ATA interfaces are enabled or disabled in BIOS Setup. Disabling an unused interface frees the interrupt that would otherwise ...

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