Design Simulation
8.1 Overview
Two primary methods are used for FPGA design validation: simulation and board-level testing. Board-level testing is implemented after the design has been placed and routed and is performed on the target hardware platform. Although board-level testing is an effective design test and debug approach, validating a design in the lab at the board level all at once without significant block-level testing is only practical for small to medium designs with limited complexity. Simulation plays a critical role in the FPGA design verification process, especially for rapid system development efforts. We will focus on design simulation in this chapter. Board-level validation will be discussed in more detail in Chapter ...
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