8 Validator Tool Suite Filling the Gap between Conventional Software-in-the-Loop and Hardware-in-the-Loop Simulation Environments
Stefan Resmerita, Patricia Derler, Wolfgang Pree and Kenneth Butts
CONTENTS
8.1 Solid System Verification and Validation Needs Improved Simulation Support
8.1.1 Real-Time Behavior in the Validator
8.2 Architecture of a Simulation with the Validator
8.2.1 Basic Features of the Validator
8.3 Setup of a Simulation with the Validator
8.3.1 Target Platform Specification
8.3.2 Task Source Code Annotation
8.4 Embedded System Validation and Verification with the Validator
8.4.1 Simulation with the Validator as the Basis for Advanced Debugging
8.4.2 Simulation with the Validator to Reengineer Legacy Systems
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