Chapter 9. Phase-Locked Loops
Most synthesizers employ “phase-locking” to achieve high frequency accuracy. We therefore dedicate this chapter to a study of PLLs. While a detailed treatment of PLLs would consume an entire book, our objective here is to develop enough foundation to allow the analysis and design of RF synthesizers. The outline of the chapter is shown below. The reader is encouraged to review the mathematical model of VCOs described in Chapter 8.
9.1 Basic Concepts
In its simplest form, a PLL is a negative feedback loop consisting of a VCO and a “phase detector” (PD). We therefore first define what a PD is and subsequently construct ...
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