Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

14.1 BASE CONVERSION

14.1.1 General Base Conversion

The general conversion algorithm described in Algorithm 7.1 for natural numbers has a mainly theoretical interest. In the context of general-purpose binary computers, a general circuit to convert n-digit base-B₁ numbers into m-digit base-B₂ ones doesn't seem to warrant practical interest. A block diagram is nevertheless presented in Figure 14.1 to illustrate a possible implementation of such a circuit, assuming a binary coding for the digits in both bases.

Figure 14.1 Block diagram of a general base converter.

The multiplier by B₁, the adder stage, and the divider by B₂ are binary operators defined as follows:

• The multiplier-by-B₁ has a (1 + log₂ (B₂ − 1))-bit input and a (2 + log₂(B₂ − 1)+ log₂ B₁)-bit output.
• The adder stage inputs are ...