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Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems by Gustavo D. Sutter, Gery J.A. Bioul, Jean-Pierre Deschamps

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14.1 BASE CONVERSION

14.1.1 General Base Conversion

The general conversion algorithm described in Algorithm 7.1 for natural numbers has a mainly theoretical interest. In the context of general-purpose binary computers, a general circuit to convert n-digit base-B1 numbers into m-digit base-B2 ones doesn't seem to warrant practical interest. A block diagram is nevertheless presented in Figure 14.1 to illustrate a possible implementation of such a circuit, assuming a binary coding for the digits in both bases.

image

Figure 14.1 Block diagram of a general base converter.

The multiplier by B1, the adder stage, and the divider by B2 are binary operators defined as follows:

  • The multiplier-by-B1 has a (1 + imagelog2 (B2 − 1)image)-bit input and a (2 + imagelog2(B2 − 1)image+ imagelog2 B1image)-bit output.
  • The adder stage inputs are ...

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