EESD Design Rules
E.1 ESD Design Rule Check (DRC)
In semiconductor chip design, electrostatic discharge (ESD) design rule checking (DRC) is currently part of the ESD design discipline. In the 1980s, no ESD design rules existed in the majority of corporations. In some of the first corporations, in the 1990s, ESD design rules were first integrated into the methodology of DRC where physical dimensions could be verified.
In ESD design rule development, the rules are defined to improve the satisfying of the ESD specifications for the qualification and release of the semiconductor components (Figure 10.1). The ESD specifications of interest for the qualification and release of components from manufacturing are the human body model (HBM), and charged device model (CDM).
The ESD design rules are as follows:
- Existence rule of an ESD network on all bond pads.
- Wire width rule for interconnects between bond pads and ESD networks.
- Number of contacts for interconnects between bond pads and ESD networks.
- Number of vias for interconnects between bond pads and ESD networks.
- Wire width rule for interconnects between ESD networks and power rails.
- Number of contacts for interconnects between ESD networks and power rails.
- Number of vias for interconnects between ESD networks and power rails.
- ESD network for HBM specification compliance.
- ESD network series resistor rule for receiver networks.
- ESD network for CDM specification compliance.
- ESD HBM network device width.
- ESD CDM network device width ...
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