Verilog Coding for Logic Synthesis

CHAPTER SIX

Design Example of Programmable Logic Block for Peripheral Interface

Chapter 6 shows an example of designing a programmable logic block for peripheral interface (similar to the industry standard of 8255 PPI), beginning from design specification, architectural definition, coding, and verification. However, please note that the example presented here is very similar to the industry's widely used 8255 PPI, but not fully compatible. The objective of this chapter is to show the reader how a logic module can be designed using synthesizable Verilog. It is not the objective of this example to replace the current industry's 8255 PPI. This example is referred to as programmable logic block for peripheral interface or, in short, “PLB”.

A peripheral interface is used widely in electronic systems that require a communication connection between several devices. For example, 8255 PPI (a peripheral interface) is used in a computer to allow for a communication connection between the microprocessor (central processing unit, or CPU) and the peripheral components of the computer.

The design of the PLB begins with a design specification on its features and capabilities.

Note: There are many ways and different styles to code synthesizable Verilog. The example of Verilog code shown in Chapter 6 is written specifically to show different ways that can be used to code certain implementation. Although some logic in this example may be similar, the style of coding written to generate this logic ...