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Verilog® HDL: A Guide to Digital Design and Synthesis, Second Edition by Samir Palnitkar

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Appendix A. Strength Modeling and Advanced Net Definitions

Strength Levels

Verilog allows signals to have logic values and strength values. Logic values are 0, 1, x, and z. Logic strength values are used to resolve combinations of multiple signals and to represent behavior of actual hardware elements as accurately as possible. Several logic strengths are available. Table A-1 shows the strength levels for signals. Driving strengths are used for signal values that are driven on a net. Storage strengths are used to model charge storage in trireg type nets, which are discussed later in this appendix.

Table A-1. Strength Levels

Strength Level

Abbreviation

Degree

Strength Type

supply1

Su1

strongest 1

driving

strong1

St1

driving

pull1

Pu1

driving

large1

La1

storage

weak1 ...

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