VLSI Design Methodology Development, First Edition

Chapter 11. Timing Analysis

11.1 Cell Delay Calculation

As described in Section 10.2, the library cell characterization flow provides delay models and output signal slew data for input pin-to-output pin arcs, as a function of input signal slew and output capacitive load. The arc delays are typically provided in terms of Non-Linear Delay Model (NLDM) tables. Rather than use a single output slew value, output waveform tables are a more recent IP library release format, consisting of a set of (value, time) points, recorded for each input slew and output load characterization simulation. During characterization, the local supply and ground rail voltages in the simulation testcases reflect the best-case/worst-case assumptions on chip bump, global ...