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All-Digital Frequency Synthesizer in Deep-Submicron CMOS
book

All-Digital Frequency Synthesizer in Deep-Submicron CMOS

by Robert B. Staszewski, Poras T. Balsara
September 2006
Intermediate to advanced
261 pages
7h 38m
English
Wiley-Interscience
Content preview from All-Digital Frequency Synthesizer in Deep-Submicron CMOS

CHAPTER 5

APPLICATION: ADPLL-BASED TRANSMITTER

The synthesizer described in Chapter 4 has a convenient method of digitally controlling the oscillating frequency through the frequency command word (FCW) that feeds the reference phase accumulator. The FCW fixed-point word could easily be augmented with dynamically changing modulating data to accomplish a frequency or phase (generally called angle in the communication theory) modulation of the synthesizer RF output. This chapter adds a necessary mechanism to accomplish this objective.

A two-point direct modulation scheme was proposed in reference [19] which performs phase compensation of the PLL by digitally integrating the modulating data bits transmitted and using the integrator output to shift the phase of the reference clock signal, while the Gaussian filtered data modulates the VCO frequency directly. However, this approach is quite analog in nature and requires precise component matching of not only the VCO but also the phase shifter. Another feedforward compensation method, which also requires precise knowledge of the VCO transfer function and other analog circuits, was proposed in reference [20]. It uses DSP to calculate the inverse of the VCO transfer function, which is obtained through lab measurements, followed by a high-precision DAC to pretune the VCO control voltage to the desired excursion. Even though the large frequency shifts could be performed quickly within the VCO accuracy, the problem of narrow PLL bandwidth ...

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Publisher Resources

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