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All-Digital Frequency Synthesizer in Deep-Submicron CMOS by Poras T. Balsara, Robert B. Staszewski

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REFERENCES

1. R. B. Staszewski, Digital deep-submicron CMOS frequency synthesis for RF wireless applications, Ph.D. dissertation, University of Texas at Dallas, Aug. 2002.

2. R. B. Staszewski and S. Kiriaki, Top-down simulation methodology of a 500 MHz mixed-signal magnetic recording read channel using standard VHDL, Proceedings of the Behavioral Modeling and Simulation Conference, sec. 3.2, Oct. 1999.

3. R. B. Staszewski, C. Fernando, and P. T. Balsara, Event-driven simulation and modeling of phase noise of an RF oscillator, IEEE Transactions on Circuits and Systems I, vol. 52, no. 4, pp. 723–733, Apr. 2005.

4. B. Razavi, RF Microelectronics, Prentice Hall, Upper Saddle River, NJ, 1998.

5. J. Craninckx and M. Steyaert, Wireless CMOS Frequency Synthesizer Design, Kluwer Academic, Norwell, MA, 1998.

6. T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge University Press, Cambridge, 1998.

7. T. C. Weigandt, B. Kim, and P. R. Gray, Analysis of timing jitter in CMOS ring oscillators, Proceedings of the IEEE Symposium on Circuits and Systems, pp. 27–30, 1994.

8. V. Reinhardt, K. Gould, K. McNab, and M. Bustamante, A short survey of frequency synthesizer techniques, Proceedings of the 40th Annual Frequency Control Symposium, pp. 355–365, May 1986.

9. J. Tierney, C. M. Radar, and B. Gold, A digital frequency synthesizer, IEEE Transactions on Audio Electroaccoustics, vol. 19, pp. 48–57, Mar. 1971.

10. L. K. Tan and H. Samueli, A 200 MHz quadrature digital synthesizer/mixer ...

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