5.1 Introduction5.2 Embedded Processors and Arithmetic Units in FPGAs5.3 Instantiation of Embedded Blocks5.4 Basic Building Blocks: Introduction5.5 Adders5.6 Barrel Shifter5.7 Carry Save Adders and Compressors5.8 Parallel Multipliers5.9 Two’s Complement Signed Multiplier5.10 Compression Trees for Multi-operand Addition5.11 Algorithm Transformations for CSAExercisesReferences