Event-Based Neuromorphic Systems

Index

action potential, 162, 164

adaptive exponential I&F neuron, 174, 342

Address Event Representation, see AER address translation, 306

AER, 12

0.02, 28–29

2D winner-take-all, 338

4-phase handshaking, 298

active pullup, 301

address space, 32, 306, 327

arbiter, 290

arbiter interface block, 290, 295

bandwidth, 20, 334, 352

burst-mode, 16, 33

connector standard, 29–32

convolution chip, 336

daisy-chain, 324

decoder, 12, 299

encoder, 12, 13, 17, 297

fair arbiter, 293

frame conversion, 311, 312, 319, 320

greedy arbiter, 293

infrastructure, Unix pipe analogy, 318

merge circuit, 324

pre-decoder, 300

protocol, 316, 317

receiver, 306

receiver pixel, 300

sender, 306

serial (SAER), 34, 324–329

silicon retina, 40

sniffer, 310

split circuit, 324

wired OR, 302

wired OR pullup, 290

word-serial, 32–33

word-serial protocol, 332

AER channel

arbitration, 23, 26, 27

capacity, 20–27, 335

collision probability, 23, 24, 26, 27

collisions, 23, 24, 26, 27

contention, 23, 27

dispersion, 20, 21, 23, 24, 26, 27

integrity, 20, 21

jitter, 354

latency, 20, 21, 24–27

load, 20, 23–25, 27

queuing, 23, 24

throughput, 20, 22, 25–27

timing error, 24, 25, 27

waiting time, 24

AEREAR, see silicon cochlea

AEX, 324–325, 326, 341

ALAVLSI, 350, 358

algorithmic event processing, 365–379

algorithmic mapping, 315

ALOHA, 27

amacrine cell, 47

amplifier, 239

analog signal processing, 249, 253

API, 355, 356, 360, 362

Application Programming Interface, see API APS, 51, 64

arbitration, 13, 21

greedy tree, 15

multidimensional, ...