© Roger Villela 2020
R. VillelaIntroducing Mechanisms and APIs for Memory Management https://doi.org/10.1007/978-1-4842-5416-5_1

1. Memory Management

Roger Villela1 
Sao Paulo, São Paulo, Brazil

This chapter introduces memory management from the perspective of the technologies available through the Intel IA-32 (32-bit) architecture and the Intel 64 (x64/amd64) architecture.


The following acronyms are used in this chapter:
  • Advanced Programmable Interrupt Controller (APIC)

  • Intel Architecture (IA)

  • Physical Address Extensions (PAE)

  • System Management Interrupt (SMI)

  • System Management Mode (SMM)

Understanding Hardware

To be able to program code in a memory management context, you require knowledge of the hardware architecture at some level.

To help with ...

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