Concepts in Concurrency 37
on multicore or other tightly coupled shared memory processors that utilize
caches to increase performance in the same manner as for traditional sin-
gle processor designs, there are mechanisms within the memory subsystem
that allow caches to behave as they are expected to. When performance is a
consideration, in sequential programming the presence of caches requires the
programmer to take the memory system into account when structuring opera-
tions such as loops to ensure that the code is written to exploit the spatial and
temporal memory access locality that caches are built to optimize. A similar
consideration must be made for caches when they exist in a multiprocessing
environment in which coherence is provided to ensure ...