July 2017
Intermediate to advanced
244 pages
6h 33m
English
This property is defined as an enumeration in the <atomic> header:
enum memory_order {
memory_order_relaxed,
memory_order_consume,
memory_order_acquire,
memory_order_release,
memory_order_acq_rel,
memory_order_seq_cst
};
In the GCC section, we already touched briefly on the topic of memory order. As mentioned there, this is one of the parts where the characteristics of the underlying hardware architecture surface somewhat.
Basically, memory order determines how non-atomic memory accesses are to be ordered (memory access order) around an atomic operation. What this affects is how different threads will see the data in memory as they're executing their instructions:
|
Enum |
Description |
|
memory_order_relaxed |
Relaxed operation: ... |
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