Appendix A: The ARM Instruction Set
This appendix lists the
ARM 64-bit instruction
in two sections: first, the core instruction set, then the NEON and FPU instructions. There is a brief description of each instruction:
{S} after an instruction indicates you can optionally set the condition flags.
† means the instruction is an alias.
ARM 64-Bit Core Instructions
Instruction | Description |
|---|
ADC{S} | Add with carry |
ADD{S} | Add |
ADDG | Add with tag |
ADR | Form PC relative address |
ADRP | Form PC relative address to 4KB page |
AND{S} | Bitwise AND |
ASR† | Arithmetic shift right |
ASRV | Arithmetic shift right variable |
AT† | Address translate |
AUTDA, AUTDZA | Authenticate data address, using key A |
AUTDB, AUTDZB | Authenticate data address, using key B |
AUTIA, AUTIA1716 | Authenticate instruction address, using ... |