March 2018
Intermediate to advanced
272 pages
7h 4m
English
Content preview from Rust High Performance
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Speeding up memory access with the cache
The first level of cache, also known as the L1 cache, is a cache located almost as close as the registers to the ALU. The L1 cache is almost as fast as a register (about three times slower), and it has a very interesting property. Its internal structure can be represented as a lookup table. It will have two columns: the first will contain a memory address in the RAM, while the second will contain the contents of that memory address. When we need to load something from the RAM to a register, if it's already in the L1 cache, it will be almost immediate.
And not only that, this cache is usually divided in two very differentiated areas: the data cache and the instructions cache. The first will contain ...
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O’Reilly covers everything we've got, with content to help us build a world-class technology community, upgrade the capabilities and competencies of our teams, and improve overall team performance as well as their engagement.Julian F.
I wanted to learn C and C++, but it didn't click for me until I picked up an O'Reilly book. When I went on the O’Reilly platform, I was astonished to find all the books there, plus live events and sandboxes so you could play around with the technology.Addison B.
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I'm always learning. So when I got on to O'Reilly, I was like a kid in a candy store. There are playlists. There are answers. There's on-demand training. It's worth its weight in gold, in terms of what it allows me to do.