Silicon Photonics: Fundamentals and Devices

8.8 Silicon-on-Insulator (SOI)

SOI-CMOS has advantages producing high-speed and low-power circuits that allow for extensive signal processing in miniature systems on a chip. The integration of photodetectors in SOI is desired for several reasons. One reason is to build imager arrays with in-pixel processing. Another reason is to replace electrical interconnections with optical ones, since the parasitic capacitances, inductances, and resistance of electrical interconnections are presently major performance limiters at the chip level.

The semiconductor layers in SOI are thin, normally in the range of 20–200 nm for fully or partially depleted SOI. Therefore, vertical p–n junction photodiodes have low responsivity, since αW_D << 1, and the term in the middle brackets of Eq. (8.40), is a small fraction of 1. To remedy the low responsivity, one employs the advantage of SOI to build amplification structures.

One option is electrical amplification, which is implemented in several ways. One way is to tie a relatively large-area photodiode with the body of partially depleted SOI 37, as shown for example in Figure 8.15. Even at low responsivity, since the leakages and capacitances of the structure are relatively small, the photo generation creates significant photovoltage (0.3–0.5 V) at the anode (A) of the photodiode, which is applied to the body of the negative-channel MOS (nMOS) transistor and decreases the threshold voltage approximately with the same value and, consequently, the nMOS ...