book

The FPGA Programming Handbook - Second Edition

Name: The FPGA Programming Handbook - Second Edition
ISBN: 9781805125594

by Frank Bruno, Guy Eschemann

April 2024

Intermediate to advanced

550 pages

11h 36m

English

Packt Publishing

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Preface
Who this book is forWhat this book coversTo get the most out of this bookGet in touch
Introduction to FPGA Architectures
Technical requirementsWhat is an ASIC?Why an ASIC or FPGA?How does a company create a programmable device using an ASIC process?Introduction to HDLsLogical versus bitwise operationsCreating gates using HDLAssign statement (SystemVerilog/Verilog)Assign statement equivalent (VHDL)Single line commentsMultiline commentsif statementFundamental logic gatesLogical NOTLogical ANDLogical ORXORMore complex operationsIntroducing FPGAsExploring the Xilinx Artix-7 and 7 series devicesCombinational logic blocksStorageClockingI/OsDSP48E1 – Xilinx DSP core in 7 series devicesASMBL architectureEvaluation boardsNexys A7 100T (or 50T)SummaryQuestionsAnswersFurther reading
FPGA Programming Languages and Tools
Technical requirementsHardwareInformation on the Nexys A7SoftwareHardware Description Languages (HDLs)SystemVerilog versus VerilogSystemVerilog versus VHDLIntroducing Vitis and VivadoVivado installationDesign flowDesign definition/specificationDesign entry/constraintsSimulationSynthesisImplementationRunning the exampleLoading the designDirectory structureTestbenchVHDL testbenchRunning a simulationImplementationProgram the boardSummaryQuestionsAnswersChallengeFurther reading
Combinational Logic
Technical requirementsCreating FPGA designsHow to create reusable code – parameters and genericsUnderstanding the basics of HDL designIntroducing data typesCreating arraysQuerying arraysAssigning to arraysHandling multiple-driven netsHandling signed and unsigned numbersAdding bits to a signal by concatenatingCasting signed and unsigned numbersCreating user-defined typesAccessing signals using values with enumerated typesPackaging up code using functionsCreating combinational logicHandling assignment operatorsIncrementing signalsMaking decisions – if-then-elseIntroducing the case statement (SystemVerilog)Using the conditional operator to select dataIntroducing the case statement (VHDL)Using custom data typesCreating structuresCreating unions (SystemVerilog)Project 2 – Creating combinational logicTestbenchSimulating using targeted testingSimulating using randomized testingSimulating using constrained randomizationImplementing an LOD using the case statement (SystemVerilog)Controlling implementation using generateDesigning a reusable LOD using a for loopSetting SELECTOR = DOWN_FORSetting SELECTOR = UP_FORCounting the number of onesImplementing an adder/subtractorAdderSubtractorImplementing a MultiplierBringing it all togetherAdding a latchSummaryQuestionsAnswersChallengeFurther reading
Counting Button Presses
Technical requirementsWhat is a sequential element?Clocking your designLooking at a basic registerCreating a Flip-Flops using SystemVerilogCreating a flip-flop using VHDLWhen to use always @() for FF generationUsing non-blocking assignmentsRegisters in the Artix 7How to retain state using clock enablesResetting the FFProject 3 – Counting Button PressesIntroducing the seven-segment displayDetecting button pressesAnalyzing timingLooking at asynchronous issuesUsing the asynchronous signal directlyProblem with push buttonsDesigning a safe implementationSwitching to decimal representationIntroducing the ILAWhat about simulation?Deep dive into synchronizationWhy use multiple clocks?Two-stage synchronizerSynchronizing control signalsPassing dataSummaryQuestionsAnswersChallengeFurther reading
Let’s Build a Calculator
Technical requirementsWhat is a state machine?Writing a purely sequential state machineSplitting combination and sequential logic in a state machineDesigning a calculator interfaceDesigning a Moore state machineImplementing a Mealy state machinePractical state machine designProject 4 – Building a Simple CalculatorPackaging for reuseCoding the top levelChanging frequencies by using a PLL or MMCMInvestigating the dividerBuilding a non-restoring divider state machineSimulating the dividerSizing the intermediate remainderProject 5 – Keeping cars in lineCreating the state diagramDisplaying our traffic lightsPulse width modulationImplementing delays with a counterSummaryQuestionsAnswersChallengeExtra challengeFurther reading
FPGA Resources and How to Use Them
Technical requirementsWhat is a digital microphone?What is PDM?Project 6 – Listening and learningSimulating the microphoneIntroducing storageInferring, instantiating, or using the IP catalog to generate RAMBasic RAM typesUsing xpm_cdc for clock domain crossingInstantiating memories using xpm_memoryVivado language templatesUsing the IP catalog to create memoryCapturing audio dataProject 7 – Using the temperature sensorProcessing and displaying the dataSmoothing out the data (oversampling)A deeper dive into FIFOsConstraintsGenerating our FIFOSummaryQuestionsAnswersFurther reading
Math, Parallelism, and Pipelined Design
Technical requirementsIntroduction to fixed-point numbersProject 8 – Using fixed-point arithmetic in our temperature sensorUsing fixed-point arithmetic to clean up the bring-up timeTemperature conversion using fixed-point arithmeticWhat about floating-point numbers?Floating-point addition and subtractionFloating-point multiplicationFloating-point reciprocalA more practical floating-point operation libraryA quick look at the AXI streaming interfaceProject 9 – Updating the temperature sensor project to a pipelined floating-point implementationFixed-to-floating-point conversionFloating-point math operationsFloat-to-fixed-point conversionSimulationSimulation environmentParallel designsML and AI and massive parallelismParallel design – a quick exampleSummaryQuestionsAnswersChallengeFurther reading
Introduction to AXI
Technical requirementsAXI streaming interfacesProject 10 – Creating IP for Vivado using AXI streaming interfacesSeven-segment display streaming interfaceDeveloping the adt7420 IPUnderstanding the flt_temp coreIntroduction to the IP IntegratorIP Integrator debuggingPackaging the projectAXI4 interfaces (full and AXI-Lite)Developing IPs – AXI-Lite, full, and streamingAdding an unpackaged IP to the IP IntegratorSummaryQuestionsAnswersCompleted designsFurther reading
Lots of Data? MIG and DDR2
Technical requirementsNote on VHDLProject 11 – Introducing external memoryIntroduction to DDR2Generating a DDR2 controller using the Xilinx MIGSetting AXI parametersSetting memory optionsDefining the FPGA optionsModifying the design for use on the boardIntroducing a few other external memory typesQDR SRAMHyperRAMSPI RAMSummaryQuestionsAnswersChallengeFurther reading

A Better Way to Display – VGA
Technical requirementsProject 12 – Introducing the VGADefining registersCoding a simple AXI-Lite interfaceGenerating timing for the VGAThe VGA monitor timing generatorDisplaying textRequesting memoryTesting the VGA controllerExamining the constraintsSummaryQuestionsAnswerChallengeFurther reading
Bringing It All Together
Technical requirementsInvestigating the keyboard interfaceProject 13 – Handling the keyboardTesting the PS/2Project 14 – Bringing it all togetherDisplaying PS/2 keycodes on the VGA screenDisplaying the temperature sensor dataAdding a custom character to the text ROMDisplaying audio dataSummaryQuestionsAnswersChallengeFurther reading
Using the PMOD Connectors – SPI and UART
Technical requirementsUART PMODACL2 PMODUnderstanding Peripheral Modules (PMODs)PMOD Type 1 and 1APMOD Type 2 and 2APMOD Type 3 and 3APMOD Type 4, 5, and 5APMOD Type 6 and 6APMOD Type 7 and 7AIntroduction to Universal Asynchronous Receiver-Transmitter (UART)Bus interfaceWaveformRegister interfaceRBR – Receive Buffer RegisterTHR – Transmit Holding RegisterIER – Interrupt Enable RegisterISR – Interrupt Status RegisterFCR – FIFO Control RegisterLCR – Line Control RegisterMCR – Modem Control RegisterLSR – Line Status RegisterMSR – Modem Status RegisterSCRATCH – Scratch Pad RegisterDLL, DLM – Divisor Register LSB and MSBUART ImplementationCPU InterfaceUART CoreMy UART originsTestingSimulationOn-board testingUnderstanding Serial Peripheral Interface (SPI)ACL2 PMODGeneric SPISPI physical interfaceSPI protocol interfaceConstructing the SPISPI state machineSummaryQuestionsAnswersFurther reading
Embedded Microcontrollers Using the Xilinx MicroBlaze
Technical requirementsUnderstanding Embedded MicrocontrollersSoft vs hard processorsCreating the MicroBlaze projectBlock DesignMicroBlaze PeripheralsExporting the designThe Software ProjectGPIOsOur Software ApplicationSummaryQuestionsAnswersChallenge
Advanced Topics
Technical requirementsExploring more advanced SystemVerilog constructsInterfacing components using the interface constructUsing structuresBlock labelsLooping using for loopsLooping using do…whileExiting a loop using disableSkipping code using continueUsing constantsPacking operatorsIndexed part select, +:, -:Streaming operatorsExploring some more advanced verification constructsIntroducing SystemVerilog queuesDisplay formatting enhancementsA quick introduction to assertionsUsing $error or $fatal in synthesisOther gotchas and how to avoid themInferring single-bit wiresBit-width mismatchesUpgrading or downgrading Vivado messagesHandling timing closureHow to pipeline a designSummaryQuestionsAnswersFurther reading
Other Books You May Enjoy
Index

Overview

Explore the role of Field Programmable Gate Arrays (FPGAs) in modern system design with 'The FPGA Programming Handbook.' You'll learn to harness the power of SystemVerilog and VHDL to develop efficient hardware circuits while mastering FPGA tools and architectures.

What this Book will help me do

Understand the fundamentals of FPGA architecture and design principles.
Gain practical experience in SystemVerilog and VHDL programming for hardware design.
Learn to create advanced FPGA projects, such as a VGA controller and embedded microcontroller.
Master the concepts of parallelism, pipelining, and other key FPGA techniques.
Acquire skills in interfacing with peripherals like keyboards, displays, and memory modules.

Author(s)

Frank Bruno and Guy Eschemann are seasoned FPGA engineers with decades of combined experience in teaching and developing hardware designs. Frank Bruno specializes in making complex concepts easy to understand for learners of all levels. Guy Eschemann has a deep passion for FPGA innovation and sharing practical knowledge, ensuring readers can implement their ideas effectively.

Who is it for?

This book is ideal for engineers, embedded system developers, and aspiring FPGA designers who are looking to gain a foundational understanding as well as to advance their skills in FPGA programming. Whether you have basic or no prior experience in FPGA design, this book provides hands-on projects and the practical guidance needed to boost your expertise.

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