In the following, we examine some representative transistor-level TIA circuits taken from the literature. These circuits illustrate how the design principles discussed in the previous chapters can be applied and combined. Circuits in a broad range of technologies are discussed. This includes the bipolar junction transistor (BJT), the heterojunction bipolar transistor (HBT), the complementary metal–oxide–semiconductor (CMOS), the metal–semiconductor field-effect transistor (MESFET), and the heterostructure field-effect transistor (HFET) technologies. For a discussion of these technologies and its devices see Refs [1–3]. We conclude with a table summarizing the performance, topology, and technology of some recently published high-speed TIAs.
9.1 BJT, HBT, and BiCMOS Circuits
High-Speed TIA
Figure 9.1 shows the TIA reported in [4]. This shunt-feedback TIA, which is optimized for high speed and low noise, is implemented in SiGe BiCMOS HBT technology.
Figure 9.1 SiGe HBT implementation of a high-speed TIA based on [4].
The voltage amplifier of this shunt-feedback TIA is implemented with a single transistor and the load resistor . The emitter degeneration resistor improves the amplifier's linearity and the feedback resistor ...
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and the load resistor . The emitter degeneration resistor improves the amplifier's linearity and the feedback resistor ...