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Bebop to the Boolean Boogie, 3rd Edition

Name: Bebop to the Boolean Boogie, 3rd Edition
Author: Clive Maxfield
ISBN: 9780080949505

by Clive Maxfield

December 2008

Intermediate to advanced

568 pages

16h 16m

English

Newnes

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Brief Table of Contents
Table of Contents
Copyright Page
Dedication
Foreword
About this Book
Acknowledgments
About the Author
Part I. Fundamentals
Chapter 1. Analog Versus Digital
It was a dark and stormy night…Analog versus digital views of the worldMulti-value digital systemsExperiments with bricks

Chapter 2. Atoms, Molecules, and Crystals
Protons, Neutrons, and ElectronsQuantum Levels and Electron ShellsMaking MoleculesCrystals and Other Structures
Chapter 3. Conductors, Insulators, and Other Stuff
Conductors and InsulatorsVoltage, Current, and ResistanceResistance and ResistorsCapacitance and CapacitorsInductance and InductorsMemristance and MemristorsImpedance and ReactanceAdmittance, Conductance, and SusceptanceUnit Qualifiers
Chapter 4. Semiconductors (Diodes and Transistors)
Herding Wild ElectronsThe Electromechanical RelayThe First Vacuum TubesSemiconductorsSemiconductor DiodesBipolar Junction Transistors (BJTs)Metal-Oxide Semiconductor Field-Effect Transistors (MOSFETs)The Transistor as a SwitchGallium Arsenide SemiconductorsLight-Emitting Diodes (LEDs)Organic LEDs (OLEDs)Active Versus Passive and Electric Versus Electronic
Chapter 5. Primitive Logic Functions
Switch Representations of AND and OR FunctionsFALSE and True Versus OPEN and CLOSEDBUF and NOT Functions“Connect the NOTs”AND, OR, and XOR FunctionsNAND, NOR, and XNOR FunctionsNot a LotFunctions Versus Gates
Chapter 6. Using Transistors to Build Logic Gates
NMOS, PMOS, and CMOSUsing os and 1s Instead of Fs and TsNOT and BUF GatesNAND and AND GatesNOR and OR GatesXNOR and XOR GatesXNOR and XOR Gates: Pass-Transistor ImplementationsPass-Transistor Logic
Chapter 7. Alternative Number Systems
Fingers, Toes, and PebblesBones with NotchesTally Sticks: The Hidden DangersThe AbacusRoman NumeralsDecimal (Base-10)Duo-Decimal (Base-12)Sexagesimal (Base-60)The Concepts of Zero and Negative NumbersVigesimal (Base-20)Jobs Abound for Time-TravelersQuinary (Base Five)Binary (Base-2)Octal (Base-8) and Hexadecimal (Base-16)Way Back in the Mists of TimeRepresenting Numbers Using PowersLucky and Unlucky NumbersTertiary Logic
Chapter 8. Binary Arithmetic
Before We Start ….Unsigned Binary NumbersAdding Unsigned Binary NumbersNines’ and Ten’s ComplementsSubtracting Unsigned Binary NumbersSign-Magnitude Binary NumbersSigned Binary NumbersAdding Signed Binary NumbersSubtracting Signed Binary NumbersBinary MultiplicationBinary Division
Chapter 9. Boolean Algebra
Cabbages, Parrots, and Buckets of Burning OilPrimitive Logic FunctionsCombining a Single Variable With Logic 0 or Logic 1The Idempotent RulesThe Complementary RulesThe Involution RuleThe Commutative RulesThe Associative RulesPrecedence of OperatorsThe First Distributive RuleThe Second Distributive RuleThe Simplification RulesDeMorgan TransformationsMinterms and MaxtermsSum-of-Products and Product-of-SumsCanonical FormsAn Interesting Conundrum
Chapter 10. Karnaugh Maps
The Tree of PorphyryJohn Venn and his Venn DiagramsAllan Marquand and Lewis CarrollMaurice Karnaugh and Karnaugh MapsMinimization using Karnaugh MapsGrouping MintermsIncompletely Specified FunctionsPopulating Maps using Os Versus 1 s
Chapter 11. Slightly More Complex Functions
First gather a bucket of logic gatesScalar versus vector notationEquality comparatorsMultiplexersDecodersTri-state functionsCombinational versus sequential functionsRS latch (NOR implementation)RS latch (NAND implementation)D-type latchesD-type flip-flopsImplementing a D-type flip-flopJK and T flip-flopsShift registersCountersSetup and hold timesBrick by brick
Chapter 12. State Machines
“Is That a Gizmo in Your Pocket, Or …”State DiagramsState TablesState MachinesState AssignmentDon't Care States, Unused States, and Latch-Up Conditions
Chapter 13. Analog-to-Digital and Vice Versa
Setting the sceneAnalog-to-digitalDigital-to-analogDSP versus DSPAnalog signal processing (ASP)Digital signal processing (DSP)DSP ExamplesWhat implements the digital signal processing?
Part II. Components and Processes
Chapter 14. Integrated Circuits (ICs)
The first integrated circuitsAn overview of the fabrication processA slightly more detailed look at the fabrication processAn introduction to the packaging processIntegrated circuits versus discrete componentsDifferent types of ICsTTL, ECL, and CMOSCore supply voltagesEquivalent gatesDevice geometriesWhat comes after optical lithography?How many transistors?Moore’s law
Chapter 15. Memory ICs
RAMs and ROMsCells, words, and arraysAddressing a word in memoryKilo, Mega, Giga, Tera, Etc.Bits and bytesROM control decodingRAM with separate data in and data out bussesRAM with single bidirectional busIncreasing width and depthMask-programmed ROMsPROMsEPROMsEEPROMs/E2PROMSFlashSRAMs and DRAMsSDRAMsDDR, DDR2, DDR3, QDR, RAMBUS, Etc.SIMMs, DIMMs, and RIMMsECC memoryMRAMsnvRAMs, FRAMs, PRAMs, RRAMs, CBRAMs, SONOS, Etc.
Chapter 16. Programmable ICs
A simple programmable functionFusible-link technologiesAntifuse technologiesEPROM, E2PROM, FLASH, and SRAM TechnologiesThe first programmable logic devices (PLDs)PROMsPLAsPALs and GALsAdditional programmable optionsIntroducing CPLDsIntroducing FPGAsAlternative FPGA architecturesAlternative FPGA configuration technologiesMixed-Signal FPGAs, CSSPs, and …
Chapter 17. Application-Specific Integrated Circuits (ASICs)
Introducing ASICsFull Custom DevicesGate ArraysHigh-Level View of the Gate ArrayDesign FlowStandard Cell DevicesHigh-Level View of the Standard CellDesign Flow1T Versus 6T SRAMStructured ASICsInput/Output (I/O) Cells and PadsASICs Versus ASSPsWho Are All the Players?Summary
Chapter 18. Printed Circuit Boards (PCBs)
Not Much FunThe First Circuit BoardsPCBs and PWBsRoHS and Lead-Free SolderSubtractive ProcessesAdditive ProcessesSingle-Sided BoardsLead Through-Hole (LTH)Wave SolderingSurface Mount Technology (SMT)Double-Sided BoardsHoles Versus ViasMultilayer BoardsThrough-Hole, Blind, and Buried ViasPower and Ground PlanesHigh Density Interconnect (HDI) and Microvia TechnologiesBackplanes and MotherboardsConductive Ink TechnologyChip-on-Board (COB)Flexible Printed Circuits (FPCs)
Chapter 19. Hybrids
The Offspring Resulting From CrossbreedingHybrid SubstratesThe Thick-Film ProcessThe Thin-Film ProcessThe Packaging Process
Chapter 20. Advanced Packaging Techniques
Sliding down the rabbit holeWire bonds versus flip-chipWire bonding and Flip-chipChip-scale package (CSP) technology3-D Die stackingSystem-in-package (SiP), PiP, and PoPA positive plethora of substratesAn example SiP based on cofired ceramicsThe mind boggles
Chapter 21. Alternative and Future Technologies
A Smorgasbord of TechnologiesReconfigurable ComputingElemental Computing Arrays (ECAs)Optical InterconnectOptical MemoriesProtein Switches and MemoriesElectromagnetic Transistor FabricationHeterojunction TransistorsBuckyballs and NanotubesDiamond SubstratesConductive AdhesivesSuperconductorsNanotechnologyOnce Again, the Mind BogglesSummary
Part III. Design Tools and Stuff
Chapter 22. General Concepts
Stuff, More Stuff, and Yet More StuffThe Origins of EDAAutomationEmbedded SystemsProgramming Versus Hardware Design LanguagesNetlistsDifferent Levels of AbstractionDifferent LanguagesElectronic System Level (ESL)
Chapter 23. Design and Verification Tools
Weasel WordsDesign CaptureFunctional Verification (Simulation)Formal VerificationLogic SynthesisLayout (Place-and-Route)Parasitic ExtractionTiming AnalysisDesign for Manufacturability (DFT)And So Much More …Turn That Frown Upside Down
Appendix A. Assertion-Level Logic
Beware—Here Be Dragons!Standard versus Assertion-Level LogicDid Someone Just Shriek?
Appendix B. Positive Versus Negative Logic
Are You Positive About That?Physical to Logical Mapping (NMOS Logic)Physical to Logical Mapping (PMOS Logic)
Appendix C. Reed-Müller Logic
“But That’s Not Logical, Captain!”
Appendix D. Gray Codes
Gray, But Not GloomyGenerating a Gray CodeBinary-to-Gray and Gray-to-BinaryIt’s too Noisy in Here!Actually Generating a Gray CodeGenerating Sub-2n SequencesGenerating Sub-2n Sequences with Consecutive Values
Appendix E. Linear Feedback Shift Registers (LFSRs)
The ouroboros of the digital consciousnessMany-to-one implementationsMore taps than you know what to do withOne-to-many implementationsSeeding an LFSRFIFO applicationsModifying LFSRs to sequence 2n valuesAccessing an LFSR’s previous valueEncryption and decryption applicationsCyclic redundancy check (CRC) applicationsData compression applicationsBuilt-in self-test (BIST) applicationsPseudo-random number applicationsLast but not least
Appendix F. Pass-Transistor Logic
“Would you pass the logic, please?”
Appendix G. More on Semiconductors
P-N junctions, depletion zones, and diodesJunction FETs (JFETs) and MESFETsDepletion-mode MOSFETsEnhancement-mode MOSFETs
Appendix H. Rounding Algorithms 101
IntroductionRound-Half-Up (Arithmetic Rounding)Round-half-downRound-half-even (banker’s rounding)Round-half-oddRound-ceiling (toward positive infinity)Round-floor (toward negative infinity)Round-toward-zeroRound-away-from-zeroRound-upRound-downTruncation (chopping)Round-alternateRound-random (stochastic rounding)Rounding sign-magnitude binary valuesRounding signed binary valuesSummary
Appendix I. An Interesting Conundrum
Inverting three signals using only two NOT gates
Appendix J. A No-Holds Barred Seafood Gumbo
Downhill mud-wrestlingIngredientsStep-by-step instructionsServing your gorgeous gourmet gumbo
Glossary
Glossary
Index
SYMBOLABCDEFGHIJKLMNOPQRSTUVWXY

Content preview from Bebop to the Boolean Boogie, 3rd Edition

Appendix C. Reed-Müller Logic

“But That’s Not Logical, Captain!”

Some digital functions can be difficult to optimize if they are represented in the conventional sum-of-products or product-of-sums forms,^[1] which are based on ANDs, ORs, NANDs, NORs, and NOTs. In certain cases it may be more appropriate to implement a function in a form known as Reed-Müller logic, which is based on XORs and XNORs. One indication as to whether a function is suitable for the Reed-Müller form of implementation is if that function’s Karnaugh Map displays a checkerboard pattern of 0s and 1s. Consider a familiar two-input function (Figure C.1).

¹ The concepts of sum-of-products and product-of-sums were introduced in Chapter 9: Boolean Algebra.

Figure C.1. 2-input ...

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Bebop to the Boolean Boogie, 3rd Edition

by Clive Maxfield