book

CMOS Analog and Mixed-Signal Circuit Design

Name: CMOS Analog and Mixed-Signal Circuit Design
Author: Arjuna Marzuki
ISBN: 9781000071511

by Arjuna Marzuki

May 2020

Intermediate to advanced

286 pages

7h 15m

English

CRC Press

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Cover
Half Title
Title Page
Copyright Page
Table of Contents
Preface
Acknowledgments
Author
Chapter 1 CMOS Analog and Mixed-Signal Circuit Design: An Overview
1.1 Introduction1.2 Notation, Symbol, and Terminology1.3 Technology, Circuit Topology, and Methodology1.4 Analog and Mixed-Signal Integrated Design Concepts1.5 Summary
Chapter 2 Devices: An Overview
2.1 Introduction2.2 The PN Junction2.2.1 Fermi Level2.2.2 Depletion Layer Capacitance2.2.3 Storage Capacitance2.3 Photo Devices2.4 FETs2.4.1 Long Channel Approximation2.4.1.1 MOS Structure2.4.1.2 MOS with External Bias2.4.1.3 MOS Operation2.4.1.4 Current-Voltage Characteristics2.4.2 MOSFET Scaling2.4.2.1 Full Scaling2.4.2.2 Constant-Voltage Scaling2.4.3 Weak Inversion2.4.4 Short-Channel2.4.4.1 Carrier Drift Velocity Models2.4.4.2 VDSAT2.4.4.3 Current-Voltage Equation for Short Channel Transistor2.4.5 MOSFET Capacitor2.4.5.1 Oxide-Related Capacitance2.4.5.2 Junction Capacitance2.4.6 MOSFET Transition Frequency2.4.7 Noise2.4.7.1 Thermal Noise2.4.7.2 Flicker Noise2.5 Process Fitting Ratio2.5.1 150-90 nm Design Transfer2.6 MOSFET Parameter Exercise2.7 SPICE Example2.8 SummaryReferences

Chapter 3 Amplifiers
3.1 Introduction3.1.1 CMOS Amplifier3.2 Input Voltage Range3.2.1 Theory3.2.2 Example3.3 Signal Path of CMOS Operational Amplifier3.3.1 Overall Signal Path3.3.2 Load3.3.3 Cascode Current Source3.3.4 Example3.4 CMOS Amplifier Parameters3.4.1 Input Offset3.4.2 Common Mode Input Voltage Range3.4.3 Current Consumption3.4.4 Common Mode Rejection Ratio (CMRR)3.4.5 Power Supply Rejection Ratio3.4.6 Slew Rate and Settling Time3.4.7 DC Gain, fc, and fT3.4.8 Noise3.4.9 Distortion3.5 Common Mode Feedback3.6 Compensation in Amplifier3.6.1 Loop Response3.6.2 Pulse Response3.7 Wideband Amplifier Technique3.7.1 Source and Load3.7.2 Stages and Feedback3.8 Noises in Amplifiers3.8.1 Noise in Circuits3.8.2 Noise in Single-Stage Amplifiers3.8.3 Noise in Differential Pairs3.8.4 Noise in Amplifier with Resistors in the Feedback3.8.5 Noise Bandwidth3.9 Current Density Design Approach3.10 Layout Examples3.11 SummaryReferences
Chapter 4 Low Power Amplifier
4.1 Introduction4.2 Low Voltage CMOS Amplifier4.2.1 Body or Bulk Control4.2.2 Circuit Technique4.3 Subthreshold4.4 Current Reuse CMOS Amplifier4.5 Other Techniques4.5.1 Common-Gate with Gain-Boosting Wideband Differential LNA4.6 Spice Example4.7 SummaryReferences
Chapter 5 Voltage Regulator, References and Biasing
5.1 Introduction5.2 Current Sources5.3 Self-Biased5.4 CTAT and PTAT5.5 Bandgap Voltage Reference5.5.1 Bandgap Reference5.6 Diode-Less Voltage Reference5.7 Cascode Current Source5.8 Regulated Power Supply5.9 Design Example5.10 Spice Example5.11 Layout Example5.12 SummaryProblemsReferences
Chapter 6 Introduction of Advanced Analog Circuit
6.1 Introduction6.2 MOSFET as a Switch6.3 Basic Switched Capacitor6.3.1 Switching Capacitor Sensitive to Parasitic Capacitances6.4 Active Integrator6.4.1 Non-inverting Switching Capacitor Non-sensitive to Parasitic Capacitances6.4.2 Inverting Active Integrator without a Delay6.4.3 Inverting the Switching Capacitor with a Delay, Non-sensitive to Parasitic Capacitances6.4.4 SC Behavior in Discrete Points of Time6.4.5 Non-inverting Active Integrator with a Delay6.5 Sample-and-Hold Amplifier6.6 Programmable Gain Amplifier6.6.1 Timing6.6.2 Common Mode Feedback6.6.2.1 AMP and CMFB6.7 Chopper Amplifier6.8 Dynamic Element Matching Technique6.9 Resistor-Less Current Reference6.10 Switch Mode Converter6.11 SPICE Example6.12 Layout Issue6.13 SummaryReferences
Chapter 7 Data Converter
7.1 Introduction7.2 Digital-to-Analog Converter7.2.1 Resistor String Topology7.2.2 Current Steering7.2.3 Hybrid Topology7.2.4 DAC Trimming or Calibration7.2.5 Glitch7.3 Analog-to-Digital Converter7.3.1 Slope ADC7.3.2 SAR ADC7.3.3 Flash ADC7.3.4 Pipelined ADC7.3.5 Delta Sigma ADC7.4 SPICE Example7.4.1 DAC Example7.4.2 ADC Example7.5 Layout Examples7.6 SummaryReferences
Chapter 8 CMOS Color and Image Sensor Circuit Design
8.1 Introduction8.2 Technology and Methodology8.2.1 General Comments on Technology or Process for CMOS Image Sensor8.2.2 Backside Illumination8.2.3 Photo Devices8.2.4 Design Methodology8.3 CMOS Color Sensor8.3.1 Transimpedance Amplifier Topology8.3.2 Current to Frequency Topology8.3.3 Current Integration Topology8.4 CMOS Image Sensor8.4.1 CMOS Image Sensor Architecture8.4.1.1 Pixel-Level ADC8.4.1.2 Column-Level ADC8.4.1.3 Chip-Level ADC8.4.2 Analog Pixel Sensor8.4.3 Digital Pixel Sensor8.4.4 Low Power and Low Noise Technique8.4.4.1 Low Power Techniques8.4.4.2 Low Noise Techniques8.5 SPICE Example8.6 Layout8.7 SummaryReferences
Chapter 9 Peripheral Circuits
9.1 Introduction9.2 Oscillator9.2.1 Ring Oscillator9.2.2 RC Oscillator9.2.2.1 Ramp Oscillator9.3 Non-overlapping Generator9.4 Interface Circuitry9.4.1 Basic Interface Circuit9.4.2 I2C9.5 I/O Pad9.6 Schmitt Trigger Circuit9.7 Voltage Level Shifters9.8 Power on Reset9.9 ESD Circuit9.10 SPICE Example9.11 Layout Example9.12 SummaryReferences
Chapter 10 Layout and Packaging
10.1 Introduction10.2 Process10.2.1 Antenna Rule10.2.2 Electromigration and Metal Density10.2.3 Shear Stress10.3 Floor Planning10.4 ESD and I/O Pad Layout10.4.1 Low Parasitic Capacitance Pad10.4.2 Seal Ring10.5 Analog Circuit Layout Technique10.5.1 Matching10.5.2 Guard Ring10.5.3 Shielding10.5.4 Voltage (IR) Drop10.5.5 Metal over Implant10.5.6 Substrate Tap10.6 Digital Circuit Layout Technique10.6.1 Power Distribution for Mixed-Signal Design10.6.2 Clock Distribution10.6.3 Latch-up10.7 Packaging10.7.1 Die Attach10.7.2 Package Type10.7.3 Package Parasitic10.8 SummaryReferences
Index

Content preview from CMOS Analog and Mixed-Signal Circuit Design

7	Data Converter

7.1 INTRODUCTION

A digital-to-analog converter (DAC) and analog-to-digital converter (ADC) can be described as a mixed-signal integrated circuit.

Resolution is a term used to describe a minimum voltage or current that an ADC/DAC can resolve. The fundamental limit is a quantization noise due to the finite number of bits used in the ADC/DAC. In an N-bit ADC, the minimum incremental input voltage of V_ref/2^N can be resolved with a full-scale input range of V_ref. That is, limited 2^N digital codes are available to represent the continuous analog input. Similarly, in an N-bit DAC, 2^N input digital codes can generate distinct output levels separated by V_ref/2^N with a full-scale output range of V_ref. An alternative definition ...

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CMOS Analog and Mixed-Signal Circuit Design

by Arjuna Marzuki

7

Data Converter

7.1 INTRODUCTION

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