CMOS Analog and Mixed-Signal Circuit Design

10	Layout and Packaging

10.1      INTRODUCTION

This chapter discusses the layout technique and packaging information. For a specific circuit, a layout specifies the position and dimension of the different layers of materials as they would be laid on the silicon wafer. However, the layout description is only a symbolic representation, which simplifies the description of the actual fabrication process. For example, the layout representation does not explicitly indicate the thickness of the layers, thickness of oxide coating, amount of ionization in the transistor’s channels, etc., but these factors are implicitly understood in the fabrication process. Some of the main layers used in any layout description are n-diffusion, p-diffusion, poly, ...