Compilers: Principles and Practice by Pearson

30 Compilers – Principles and Practice

IX2 – Index Register 2, 32-bits; Register no. 2.

IX3 – Index Register 3, 32-bits; Register no. 3.

IR – Instruction Register, 32-bits; divided into OP (1-byte), MOD (1-byte) and ADDRS (2-bytes);

holds an instruction being executed.

MOD – A part of IR, consisting of m (2-bits), RP (3-bits), R (3-bits); m determines the addressing

mode used:

00 – Direct address

10 – Indirect w.r.t RP (the numbered registers R)

01 – Indexed w.r.t RP

11 – Indirect (indexed w.r.t RP)

Some of the op-codes of VM1 are given in Table 2.1.

Address 0000 is for an input/output device. LD 0000 will read from the input device and ST 0000

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