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Design for Embedded Image Processing on FPGAs
book

Design for Embedded Image Processing on FPGAs

by Donald G. Bailey
August 2011
Beginner to intermediate
416 pages
20h 4m
English
Wiley-IEEE Press
Content preview from Design for Embedded Image Processing on FPGAs

Index

A/D conversion

A|RT

ABAX

Achronix

Actel

adaptive coding

adaptive histogram equalisation

adaptive thresholding See thresholding

affine transformation

algorithm development

environment

aliasing

Altera

ALU

Amdahl's law

anti-alias

Apex20K

apodization function

approximation components

arbitration

architecture selection

Arithmetic coding

Arria

Artix

ASC

ASIC

associative memory

asymmetric signed digit

AT40K

Atmel

Axcelerator

Bach-C

background model

background subtraction

bandwidth constraints

bank switching

barrel shift

Bayer pattern

Bayesian classification

bin sort

binary search

binary tree

binning

bipartite tables

bit-reversed

bit-serial

blemish

blob detection

block RAM

Booth multiplication

bottleneck problem

bounding box

B-splines

bubble sort

busses

cache

row buffer

calibration

camera See also sensor

analogue

single chip

three chip

Camera Link

Canny edge detector

canonical signed digit

carry propagation

carry save adder

carry select adder

Catapault C

census transform

centre of gravity

chain code

feature extraction

change detection

character generation

Chinese remainder theorem

CIE L*a*b*

CIE L*u*v*

CIE xyY

CIE XYZ

circular buffer

city block distance

classification

unsupervised

classification failure

clock domain

closing

clustering

CMYK

coding

collimator

colour

balancing

classification

constancy

conversion

correction

detection

enhancement

histogram See also histogram

indexing

normalisation

segmentation

thresholding

tracking

colour filter array See Bayer pattern

colour filtering ...

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Publisher Resources

ISBN: 9780470828496Purchase book