Electronic Design Automation

Chapter 7. Test synthesis

About This Chapter

Test synthesis is an important step in VLSI testing for automating the process of producing testable VLSI designs. The test synthesis flow typically includes testability rule checking and repair in the beginning to guarantee that the design has complied with all given testability rules. Once all rules are met, test synthesis is then performed to automatically insert test logic into the design. The test logic can include design-for-testability (DFT) circuitry used for scan design, logic built-in self-test (BIST), and/or test compression. Depending on the test requirements, additional circuitries for design-for-debug-and-diagnosis (DFD) and design-for-reliability (DFR) could also be inserted. These ...