Chapter 7Silicon Power Distribution and Analysis

With the advancement of silicon and integration of multiple chips into single devices and packages, it is now understood that inside the silicon is where the quality of the power delivery path must be addressed. As the power supply gets closer to the actual load, the power distribution issues that the platform teams have to address, are even more critical when the distribution path is also now silicon. This chapter focuses on silicon power integrity, and how to deliver high-quality power to the load when power comes onto or near the die. Similar to the platform PDN, the problems and analysis of on-die power distribution will be examined. The on-die or on-silicon link is the electrical path from the bumps, or contacts on the package, all the way to the load. As the issues around the PDN are analyzed, it will be necessary to discuss layout and routing constraints on die as well. The distribution on die and how that distribution routes to the loads are critical to power integrity because these paths determine most of the quality of the power delivery. Additionally, there will be a discussion on basic on-die and on-package power conversion focused on package regulation and power regulation techniques (with switching power FETs, etc.). There are other internal methods, such as linear regulation and switched capacitor technologies; see also Chapter 2. With the moving of the voltage regulation closer to the load, there are different ...

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