October 2017
Intermediate to advanced
354 pages
9h 28m
English
Content preview from Mastering Linux Kernel Development
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Page tables
All access operations on process virtual address regions are put through address translation before reaching the appropriate physical memory regions. The VM subsystem maintains page tables to translate linear page addresses into physical addresses. Even though the page table layout is architecture specific, for most architectures, the kernel uses a four-level paging structure, and we will consider the x86-64 kernel page table layout for this discussion.
The following diagram depicts the layout of the page table for x86-64:
The address of the page global directory, which is the top-level page table, is initialized into control register ...
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