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Principles of Power Integrity for PDN Design--Simplified: Robust and Cost Effective Design for High Speed Digital Products
book

Principles of Power Integrity for PDN Design--Simplified: Robust and Cost Effective Design for High Speed Digital Products

by Eric Bogatin, Larry D. Smith
March 2017
Intermediate to advanced
816 pages
18h 20m
English
Pearson
Content preview from Principles of Power Integrity for PDN Design--Simplified: Robust and Cost Effective Design for High Speed Digital Products

Index

Numbers

0th droop. See clock edge current

1-inch diameter copper loop, measuring impedance of, 102–105

1st droop, 661

2nd droop, 661

3D field solver

0th droop, 195–202

extracting spreading inductance from, 304–306

4-point Kelvin resistance measurement technique, 93–95

182 nF ideal capacitor, 27–29

0603 multilayer ceramic chip (MLCC) capacitor, 27

A

Aconductor, 343, 370

Adielectric, 344, 370

abAmps, 146

abHenrys, 146

AC steady state responses, 589–595

AC tolerance, 660

ADCs (analog-to-digital converters), 5

ADS (Advanced Design System), 22, 84–85

Agilent Technologies, 22

Ampere’s Law, 168

analog-to-digital converters (ADCs), 5

approximations, inductance

parallel plate approximation for loop inductance, 183

round loop inductance, 179–182 ...

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Publisher Resources

ISBN: 9780132735568Purchase book