Scalable Shared-Memory Multiprocessing

110 ^ System Performance Issues

3.3.5 Latency Hiding Summary

There are two general mechanisms for hiding memory latency: issuing the operation early

and doing something else while waiting on the operation. For hiding write latency, there is

the additional mechanism of using a relaxed memory consistency model. In this section, we

discussed four different techniques for hiding memory latency in multiprocessors. Prefetch-

ing and producer-initiated communication issue memory operations early, multiple-context

processors switch to another context while waiting on the operation, and relaxed consistency

memory models hide write latency. All of thes ...