The Definitive Guide to the ARM Cortex-M0

I

I/O

49–51 , 126–39 , 143–57 , 169–70 , 225–9 , 235–8 , 264–75 , 324–9 , 346 , 381–84 , 388–403 , 428–39 , 512–13

see alsoinputs ; outputs

settings or low-power mode problems

235–8 , 512–3

I2C

49 , 129–39 , 427–30

IAPSR

82

IAR Kickstart Kit for LPC1114

432 , 437

IAR Systems

10 , 17 , 66 , 432 , 437

IBRD

63–4

ICE, concepts

52–4

ICER

453–5

ICSR

seeinterrupt control state register

IDE

52–4 , 231–58 , 259–62 , 361–84 , 386 , 431–6

idiom recognitions, C

309

if-then-else program control operation, concepts

107 , 109–10

implementation features, ARM Cortex-M0

16

IMPORT (Assembly directive)

293–300 , 306–8 , 410–2

in-circuit debuggers, concepts

52–4 , 222–9 , 231–58 , 324 , 373–4

inactive task state, Keil RTX

339–40

incorrect interrupt return instructions, interrupt problems

512

init

340–59 ...