Advanced Frequency Synthesis by Phase Lock

INDEX

accumulator, 10

capacity, 106

length, 105

shortened, 48

table, 267

size, 106

truncation, 97

with dither, 102

noise from, 97

with seed, 101

simulating, 100

with small frequency offset, 101

adapting a model, 118

ADPLL, 145

ADPLL synthesizer, 145, 151

alternate architecture, 164

concept, 151

DCO, 153

dead zone, 160

fractional spurs, 157

improving resolution, 155

mathematical representation, 152

model, 168

modulation response, 159

noise level, comparitive, 155

phase noise, 154, 155

critical source, 154

PSD due to finite resolution, 155

quantization noise cancellation in, 159

reference noise, 161, 165

resolution, noise due to, 154

simulation of, 159

synchronization, 154

TDC, 155

calibration, 167

improved resolutions, 157

linearity, 157

aliasing in spectrums, 256

all-digital frequency synthesis, 145

.. See also ADPLL synthesizer

alpha, 110

alseed, 114

Andreani, 230

anomalous spurs, 109, 258

Appendix E.xls, 180

architectures, other than MASH-11…, 81

Arora, 72, 74, 261, 264, 270, 275

average frequency, 145

Axis Properties, 107

Balsara, xvi

Banerjee, 13, 48, 57, 58

Banerjee noise model, 58

basic-reference noise, 56

Bizjak, 121

block sets, required Simulink^®, 259

Bode plot. See also loop response

damped loop, 212

primary loop, 208

with sampling, 136, 189

Boon, 94

Borkowski, 84, 267

Bracewell, 228

Brennan, 72

calibration of TDC, 167

cancellation

fractional, 171

of quantization noise, 92

.. See also quantization, noise, canceling

techniques, noise, 15

carry, 11

Cassia, 26, 177, 195 ...