Chapter 1. Essential Concepts
An Introduction to electronics gives the basics of Ohms law, Kirchhoff’s current & voltage laws, current and voltage sources, how resistors, capacitors and inductors function, and similar. A typical curriculum will treat these things as ideal to clearly convey the basics. Unfortunately, academic simplifications can be misleading. Real world applications frequently run into problems when ideal concepts fall short. Nothing is ideal.
This chapter takes a brief look at some of the “less than ideal” components seen in real world applications, how they differ from ideal devices, and where designers need to pay attention to the limitations of non-ideal devices. This chapter is about building an awareness of problems that are commonly encountered; while the rest of the book develops solutions to, or, strategies to avoid, these issues. In order to solve any problem, the designer needs to be aware of the problem first. Again, nothing is ideal.
Remember That: Basic Electronics
There are many textbooks that cover fundamental electronic design from scientific, engineering and hobbyist perspectives. The intention here is not basic electronics, but going into the important things needed to design a reliable electronic system. The following illustrations serve as a quick benchmark. If you can look through these two panels of topics, and be reasonably familiar with them you should have the needed background to work with the material presented here (Figure 1-1 and 1-2).
If some items are unfamiliar, reference books, online search, or many online tutorials exist. Many sources cover the basics, but that is not the focus here.
Ideal Simplifications of Academia
Modern electronic systems are predominantly digital, but most design problems are analog in origin. Items such as noise, signal integrity, power stability, electromagnetic interference (EMI), and connection impedance are common problems. These issues can quickly degrade, or render nonfunctional, any electronic system. Digital systems are more tolerant of these issues, but fully digital devices can be broken by analog limitations.
When explaining electronics, a simplified representation gives a quick idea of how something should work. That “first order” model is useful for simplicity and illustration, but frequently leaves out important details. That simple model is often an incomplete model and many of the “second order effects” left out can affect device performance significantly. Becoming aware of a more detailed model helps lay a foundation for better design. The techniques presented here all pay attention to second order effects, and provide methods to deal with them.
As a start, the idea of connecting things together needs a closer look (Figure 1-3):
As shown, a short piece of wire can have significant impedance. A piece of 24 AWG wire, 10cm long, will have 100nH of inductance, 10 milliohms of resistance, and capacitive coupling to the environment around it. In this example, the wire impedance and capacitance to the outside environment will act as a LPF above 300-400 MHz, and be sensitive to motion, due to capacitance changing as a function of wire placement relative to ground. Larger wire can reduce resistive losses and parallel wire connections can reduce inductance some, but the inductance is not easily removed.
A similar 10cm connection on a PCB shows identical characteristics. In this example, the inductance is about the same as the wire, and the capacitance has increased due to the connection being tightly spaced over a ground plane. For this situation, the PCB trace will start to perform as a LPF around 80-90 MHz due to the increased capacitance. One advantage of the PCB trace over the wire is that the characteristics of the impedance will not change due to the fixed environment that the PCB creates.
The takeaway here is that every connection has impedance, and some coupling to an outside environment.
When connecting things together, the impedance of the source, the connection, and the load, all play a part in how much signal loss occurs. Signal loss and distortion get progressively worse with both longer connections and higher frequencies. Designers working under 50 MHz and on a small (10cm x 10cm) PCB generally can ignore much of this and survive. High bandwidth, long distances, and connections off the PCB make interconnect issues a significant part of the design problem.
In addition to loading and losses associated with connection impedance, high frequency signals with a lengthy connection also exhibit transmission line characteristics. For the example of the 10cm connection, current takes about 0.7 ns to transit the wire. Depending on connection length and the frequency of the signals involved, improperly terminated transmission lines can affect signal integrity.
Consequently, designers need to consider transmission line issues when the signal wavelength becomes a significant part of the connection distance. For the 10cm wire example, and keeping under 0.1 wavelength on the wire, would limit this at a 280 MHz sinusoid. A digital signal has multiple harmonics that need to be included, further limiting the connection’s capability.
A termination impedance (Zterm) should match the characteristic input impedance (Zii) of the line to minimize reflections on the transmission lined. Practical applications terminate at both ends of the line (Zsrc and Zterm) to minimize both the initial reflection, and any residual reflection that that went back to the driven end.
The use of impedance matching, striplines and creating data paths with high signal integrity are topics covered in the chapters on data communication and PCB layout methods.
Even a solid copper sheet used as a PCB ground plane will exhibit resistance and inductance between locations. A current surge anywhere on a dedicated ground plane will cause that location to have a voltage transition relative to other locations on the ground plane. A surge current into the ground is analogous to a person bouncing on a trampoline. That ground bounce can be kept low by minimizing ground impedance and minimizing the magnitude of current surges into the ground.
It is important to recognize the concept that there is not a singular ideal ground, but rather that the voltage of ground can vary, with both proximity between points and the characteristics of the current dynamics passing through the ground plane.
Both power and ground connections exhibit impedance. The typical electronic device presents switched loads between power and ground, causing the power voltage to drop and the ground to rise. The magnitude of P&G variance is influenced by the connection impedance and the transient rate at which the current changes (dI/dt). The transient current can be changed through the load resistance variance, and how much capacitance is present across the load. Proper system design adjusts these variables to give good enough P&G stability to maintain proper functionality. In most situations P&G bounce can be kept manageable with proper circuit techniques, power bypass filtering and PCB layout.
Connections between circuit boards will have signal integrity problems on all connections. Current surges on P&G wires will create voltage variances between the separated boards. That variance makes noise on any ground referenced signal, relative to the local ground. External stimulus like EMI or electrostatic discharge (ESD) can further corrupt all signals. Special efforts need to be made to “clean up” the noisy raw power coming into the board and create clean power on the PCB. Also, data and signals need to be passed between boards in a manner that is not dependent on local grounds or power supplies. The chapters on power systems, noise, and digital communication deal with these issues.
Distributing a common signal to multiple receivers can result in phase errors between signals received. The figure shows one signal going to five locations. The distributed connection impedance, the path length, and the capacitive receiver loading, all results in five different phases of the original signal. This is a common problem in “clock tree distribution” especially with high clock frequencies, multiple destinations, and longer distances.
Frequently, designers don’t consider interconnect issues until problems arise. At that point, it’s an expensive redesign. When high currents, long connection paths or high frequencies are involved it needs to be carefully considered in the design.
The evolution of electronics includes a diverse collection of devices many of which are now obsolete. The emphasis here is on modern systems that will be commercially manufactured in volume. Axial lead devices and other through-hole components are minimized in most high-volume manufactured devices. Consequently, surface mount circuit components are the focus here.
A distributed element model of a “Surface Mount Multi-Layer Ceramic Capacitor” (SMT MLCC) is shown.
This type of capacitor has multiple interleaved conducting and insulating layers. The actual capacitance is between adjacent plates ( C ), all plates have a small amount of resistance (R), and the interconnect has inductance (L). A distributed element model can be awkward to work with, and an equivalent model is generally sufficiently accurate.
The equivalent model, also known as a “lumped element” model includes elements which model externally observed behavior. This device includes a single ESL “Equivalent Series Inductance (L)” ESR “Equivalent Series Resistance”, a single capacitor and a leakage resistance. The principle capacitor element can vary, primarily as a function of temperature and the voltage across it. The variability is due to the insulating dielectric characteristics used between the plates.
Depending upon application, some elements can be ignored, or in other scenarios, limit the device performance. ESL is important for radio frequency (RF) circuit performance and high frequency power filters, but does not affect low frequency performance. ESL with the C creates a self resonance tuned circuit, which limits the high frequency response of the capacitor.
Leakage resistance becomes an issue if a capacitor is used to hold a static charge for an extended time. ESR becomes apparent in circuits using high surge currents through the capacitor.
The SMT-MLCC makes up the majority of PCB capacitors due to excellent reliability, low cost, and wide selection options available.
Modern capacitors make tradeoffs between:
capacitance per unit volume
maximum applied voltage (breakdown voltage)
min-max operating temperatures
temperature variation from nominal value
applied voltage variation from nominal value
aging variation from nominal value
nominal value accuracy
total overall life
These parameters can interact, if the manufacturer changes one parameter it can affect another. One example: Creating a higher breakdown voltage implies a larger body size for the same value of capacitance.
SMT-MLCC capacitors have different dielectrics, which leads to different performance parameters. Looking at the more common devices, some brief comments are useful to better understand the differences:
- C0G, NP0:
These are known as Class 1 capacitors, designed for minimal thermal variance, and minimal change from voltage bias. Class 1 devices sacrifice capacitance per unit volume in order to achieve higher accuracy and stability. For a given body size, the total capacitance is limited. These devices are useful for tuned circuits and other applications, where accuracy and stability are needed.
- X5R, X7R, Y5V, et al:
These are known as Class 2 capacitors, their design sacrifices voltage bias accuracy and thermal stability to achieve more capacitance within a given volume. The notation used for these devices is a little confusing, but actually simple to decode. The three characters decode to a minimum temperature, maximum temperature, and value variance over temperature.
An X7R capacitor is designed for use from -55C to +125C and will have +/- 15% variance over temperature. The Y5V capacitor is designed for use from -30C to 85C and will have from +22% to -82% in value. Picking the proper capacitor dielectric can significantly affect accuracy.
Class 2 devices also exhibit “DC Bias Effect” also known as the “DC Voltage Characteristic” which consists of changes to the capacitance value as a function of the static DC voltage across the device. Generally, the value of the capacitance decreases as the bias voltage increases. This can be significant, with as much as 60% of the capacitance value changing, depending on the specifics of the device. Devices with a higher breakdown voltage tend to have less DC Bias effect for the same voltage change, if a designer needs to reduce this effect. Need to check your specific capacitors and determine how much this affects your design.
Entire books have been dedicated to capacitors. A closer look at the limitations of the SMT-MLCC is warranted because it is the predominant capacitor used in modern designs.
Several other capacitors are frequently used in modern designs. The Aluminum Electrolytic Capacitor (AEC) is widely used in DC power supply filters and other applications where large amounts of capacitance in a small package, and low cost, are needed. All AECs suffer from poor high frequency response due to high ESL, so AEC’ are not suitable for RF situations. High frequency response can be supplemented by parallel SMT-MLCC devices if needed. The AEC also has a limited life, fussy temperature restrictions, and significant ESR. Check device specifications for ageing information and lifetime vs. temperature data. Most AEC devices have performance and lifetime parameters that are unique to a specific manufacturer and product line.
Both tantalum and aluminum-polymer capacitors are available in high reliability and long life variants. Component selection here needs to be done on a case by case basis because these devices also have short life variants as well.
Important things to look for in a capacitor:
Nominal component value and fabrication tolerance
Dielectric type, temperature range, variance over temperature
DC Bias Effect and device variation due to bias voltage
ESL characteristics and self resonance frequency for high frequency applications
ESR characteristics where series resistance can affect performance
Reliability, lifetime and aging data
A typical resistor model is shown in Figure 1-29-. In addition to the ideal resistance “R” some additional elements need consideration. These are: Equivalent Series Inductance (ESL), Equivalent Parallel Capacitance (EPC), and internally generated noise (Vn) created by the resistance itself.
Ideally a resistance creates a flat impedance over frequency. Because of EPC and ESL, the impedance may not be flat at high frequencies. For DC bias applications, the ESL and EPC can be ignored. Multi watt resistors are commonly fabricated with wire wound methods, and have significant ESL and EPC components.
Most modern surface mount resistors are some type of film resistor: thick film, thin film, and metal film are common descriptions of devices available. Multiple vendors have found many different approaches to making resistors. Generally, metal film resistors are lower noise than carbon and thick film devices, but check specific vendors for noise data.
Thermal noise, also known as Johnson-Nyquist noise is created by the thermal agitation of electrons in a resistive material. For most large signal applications this noise is not a significant issue. It does become important in RF front ends, communication channels, and low amplitude scenarios, where signals are in the nanovolts.
Gigaohm resistors are available from manufacturers, but special considerations have to be made to use them. Dust and humidity in the environment can have a lower impedance path than the resistor. As a general rule, anything over 100K ohms needs special environmental consideration to avoid alternative current paths around the resistor. Most modern designs don’t need high value resistors, because most analog circuits that used them in the past have been replaced with more reliable digital methods.
Important things to look for in a resistor:
Nominal component value and fabrication tolerance
Material Composition, film resistors are preferred, older carbon based resistors should be avoided
Temperature Range, min-max
Maximum voltage rating, for high voltage applications.
Thermal variance, sometime specified as Temperature Coefficient of Resistance
ESL for high frequency situations
Thermal Noise, Carbon Contact noise
Stability, repeatability, aging
A high frequency model of an inductor is shown in Figure 1-29. Some Equivalent Parallel Capacitance (EPC) exists, which limits the useful frequency range. With EPC and L in parallel, the device will resonate as a tank circuit and look like an open circuit at the Self Resonance Frequency (SRF). Below SRF the device functions as an inductor, above SRF and the device performs like a capacitor.
The Equivalent Series Resistance (ESR) defines the quality factor (Q) of the inductor when used as part of a filter. When used in a switching power converter, ESR will limit power efficiency.
Inductors are commonly used in power conversion, RF signal processing, and EMI limiting. Inductors are used in switched mode power conversion, both AC-DC and DC-DC converters. Inductor priorities for power conversion are maximum current, saturation current, thermal range, and resistive losses. Switching converters have high current transients and suitable devices are wire wound on a magnetic core, with high current capability and low resistive losses.
Inductors in RF signal processing are used in tuned circuits and need consistent accuracy for reproducible frequency response. Priorities are high Quality factor, component tolerance/accuracy and making sure the SRF does not affect the signals being processed. Lower currents are used in signal processing inductors and many components exist in surface mount variants.
Inductors used for EMI limiting are commonly known as chokes. The purpose is to pass DC current to reduce/eliminate any transient currents in the connection. High current chokes are commonly done with a wire wound power inductor. Low current chokes can be implemented with smaller surface mount inductors. More discussion of this topic is in the chapter on noise reduction methods.
Important things to consider in an inductor:
Component value and tolerance, will it meet needed accuracy of the design?
What is the SRF? Does it affect the signals of interest?
Current Rating, Peak and Average
Core Material and Saturation Current
DC resistance and device Q
Shielded or Unshielded
Voltage Sources & Batteries
The ideal voltage source doesn’t exist. An infinite source of current at a fixed voltage is an academic concept. Practical implementations of a voltage source can be the output of a voltage regulator, a battery, or another generation source. Invariably, these all have limitations.
Any practical voltage source model includes source resistance (Rsrs), a noise component (Vnoise) and the voltage source which is a function of the output current (Iload). The goal in a design is to minimize the Rsrs, Vnoise, and the dependency on Iload.
Batteries have a limited life, so voltage variation over discharge has to be added to the model. Also batteries have current limitations on both charging and discharging, reduced performance with ageing, and a myriad of special consideration depending on the particular battery type. The battery systems chapter is devoted to the design, care and feeding of battery supplies.
The characteristics of the Vnoise signal will be highly dependent upon the methods used to create the voltage source. Linear power supplies and regulators that have been carefully optimized for noise are available when low noise power is needed. Batteries are very low noise but not perfect and can generate electrochemical voltage noise dependent on charge state, or the battery charger can superimpose noise onto the power. Switching power supplies will have high efficiency while generating commutation noise associated with the voltage regulation function. Most modern design work doesn’t need ultra low noise power, but any chip designed into a system needs to be investigated for its “noise on the power” limitations.
Similar to the ideal voltage source, an ideal current source doesn’t exist. There are a number of circuit designs that come close, with restrictions and limitation on impedance and voltage range.
A practical current source includes some source resistance (Rsrs), a noise component (Inoise) and output current that is a dependent function of the output voltage (Vout). Most current sources are limited in the voltage range where it maintains appropriate, fixed current, behavior. Discrete current sources are not commonly used in board level SOC design, but are an important building block within analog and mixed signal IC design. Research the topic “cascode current sources” for further information.
Switches and Relays:
A mechanical switch or relay can be problematic, especially if it is used as a control input on a logic port. Both exhibit similar problems due to their mechanical implementations.
Mechanical switches and relays exhibit contact bounce, where the process of opening and shutting contacts creates multiple brief open-shut states. If used as a digital logic input, opening and closing contacts are seen as an erratic string of data states due to the imprecise mechanical contacts. Using a switch on a logic port requires software polling the port multiple times and determining state change after remaining stable for 50 -100mS.
In addition to contact bounce, switches have inductance (L) that adds impedance to a closed switch. Parasitic capacitance (Cpar) allows high frequency signals to pass through an open switch. Also, contacts have highly variable resistance (Rpar) and can change with every switch cycle. This variability gets worse with age as contacts become dirty or damaged.
The ideal operational amplifier (op-amp) claims to have infinite gain, infinite bandwidth, infinite voltage range, infinite current output, zero input current, zero noise, zero offset voltage, and, best yet, no power supply is needed. As a math model, it’s an interesting idea, but reality is something else.
The real op-amp has limitations that affect performance. First, the device requires power and ground (Vpower, Vgnd) and the output (Vout) can be sensitive to noise present (NP, NG) on these connections. The output has impedance (Rout) and the output voltage (Vout) is restricted by the power supply voltage. The gain is not infinite, rather an open loop gain of 80dB is typical.
The gain response over frequency will have both bandwidth limitations and an additive phase response. Also, the output response speed is limited by a maximum “slew rate” at which the device can respond. Since an op-amp is designed to function within a closed feedback system, the high frequency gain of the devices must be internally limited to keep it stable within a feedback configuration. Due to this frequency compensation, op-amps may not be the best device to use in a high frequency design.
Input capacitance (Cinp) creates loading that can affect high frequency performance. Op-amps designed with bipolar transistors will have input bias current (Ibias). The input transistors used within the op-amp, will not be perfectly matched and creates an equivalent input offset voltage (Voff) that is typically 1-10mV depending on the specific device. That offset voltage becomes a problem when dealing with small signals or high gain closed loop configurations. The internal circuitry will create noise, which is modeled as an Input Referred Noise (IRN) source.
Many of these limitations are not a problem when working with larger signals, but pushing for high gain, high bandwidth, or using sub-mV signals, will show performance limitations. Performance specifics will depend on the op-amp selected, with many variants commercially available.
A voltage comparator shares many things in common with the op-amp model.
The comparator also has sensitivity to power and ground noise (NP, NG), input loading capacitance (Cinp), input referred noise (IRN) and input offset(Voff), similar to an op-amp. Since the typical application is against a fixed reference voltage (Vin -) a simple one sided model will suffice.
The difference between an op-amp and comparator center is the fact that an op-amp is designed to function within an analog feedback loop and a comparator is not. Comparator gain is often higher (Gain = ~100dB), no internal frequency compensation is used, and the output is digital. A variable time response is part of a comparator model since input to output time can be dependent on the input signal amplitude. Small signals with a minimal crossover voltage are slower to propagate through the circuit than a larger voltage transition.
Non Ideal Digital
Digital devices are generally more resilient to noise than analog signals. However, even digital systems have non-ideal problems and limitations.
Figure 1-29- shows communication between two digital devices. In modern designs, discrete gates are uncommon, but this illustrates communication between any two digital devices, such as FPGA’s, micro-controllers, or other devices that share a common power and ground (P&G). As illustrated, the P&G between devices includes connections with distributed inductance. Depending on what else is connected to the P&G network, currents drawn from, or injected into, the P&G network can cause the connection to reactively dip or rise. As well, the magnitude of that “bounce” can be different at various locations on the network. Illustrated here, the P&G network at one location (PWR1, GND1) has different characteristics than at another location (PWR2, GND2). How much of this bounce is tolerable depends on the transistor technology used in the digital gates, but keeping the P&G stable has to be a priority. Generally, CMOS semiconductors are designed with transistor threshold voltages about one third of the power supply voltage, and can tolerate P&G instability of 20 percent of the nominal power before digital devices start to generate false states. Any commercial product will specify acceptable voltage ranges for both high and low logic states. That specification is a quick guideline to how much P&G noise is tolerable.
As shown in the illustration, a clean two state signal at “A” can be corrupted by unstable P&G (PWR1, GND1) at its output (B) – which is then further disturbed by the variation in P&G (PWR2, GND2) at the receiving end (C) leaving an output (D) that no longer represents the original signal.
False state generation is just one of many problems seen in digital systems.
Consider the clocked system shown in Figure 1-29- , with two devices communicating at the same frequency but using uncorrelated clocks. Although the clocks are the same frequency, there is no fixed phase relationship between devices. As the phase changes, the data to clock relationship periodically violates setup-hold times and data errors occur. The chapter on data communication covers techniques to deal with reliable non synchronized data transfer.
Asynchronous logic should be avoided due to unpredictable outputs and digital glitches.
Although this example is a bit contrived, the Boolean analysis says the output should never assert. Reality shows the propagation delay of the inverter affects output. This illustrates the motivation for synchronous logic where data resynchronization to a clock is used to avoid glitches.
In addition to problems created by timing relationships, digital functionality can suffer due to the analog characteristics of digital signals. Several factors can contribute to this: higher data rates, resistance of the transmission path, or a transmission path that is loaded with capacitance.
A simple driver and receiver pair are shown in Figure 1-29- . The middle diagram shows the interconnect impedance with resistance of the PCB (Rpcb), Inductance (Lpcb), and capacitance (Cpcb).
The bottom diagram includes an equivalent model for the output driver and receiver. For CMOS logic, the output driver can be modeled as a pair of switches and a resistor (Rout). Rout, depending on transistors used, will be typically 10 to 80 ohms. In addition, the receiver input behaves as a capacitance for most situations. This input capacitance is due to large, high current, ESD protection circuits, and 2pF to 10pF are common for each logic gate. Ignoring interconnect inductance, this model shows that an RC low pass filter is present in every digital interconnect.
With this more detailed model, the frequency limitations of logic are apparent.
Figure 1-29- looks at the limitations created by the RC circuits created by the output driver resistance and the attached capacitance. On the left, at lower frequencies, enough time is available for the transient behavior to settle out before the next transition. On the right, as time is reduced between transitions, the device has insufficient time to settle out. The RC time constant of the system remains the same, but no well defined logic states are achieved. The system fails when Vhigh or Vlow limits are violated, or setup and hold time on flip flops are not met. Ground referenced logic frequently fails when used for high frequency communication. Differential signals are commonly used at high data rates to minimize this limitation. More information can be found in the digital communication chapter.
Undesired effects can be created by a circuit in addition to its normal functionality. Many electronic systems create unwanted electronic noise by creating signals that radiate externally. Also, one part of a system can create noise that interferes with the proper functionality of a different part of the same system. In some cases, a poorly designed system can be sensitive to externally created electromagnetic interference. Signal integrity, Radio Frequency Interference (RFI), Electromagnetic Interference (EMI), Electromagnetic Compatibility (EMC), electronic noise, RF Immunity, electromagnetic shielding, radiated emissions, crosstalk, et al. are all related topics in this area.
Again, using the 10cm connection discussed earlier, the above example creates radiated emissions with an ideal quarter wavelength antenna at about 700MHz. For this example, a 100 MHz clock would have its 7th harmonic have an optimal antenna, making the connection a radio transmitter. All frequencies would radiate from that connection, albeit with varying amounts of efficiency. Radiated emissions are especially problematic from computers and any device with large amounts of high frequency digital circuitry. The FCC (USA) and other worldwide regulatory bodies restrict the EMI that any device is allowed to produce in order to minimize interactive problems between electronic devices. More information can be found in the chapter on Noise Reduction Methods.
In addition to radiating EMI to the outside world, devices can be internally sensitive to unintended communication between circuits, commonly called crosstalk. This noise coupling, can be capacitive or magnetic, and often takes both paths. Figure 1-29- illustrates a common problem with digital signals, having high frequency content, coupling to an unconnected circuit path. More information can be found in the chapters on digital communication, noise reduction, noise immunity, and PCB design.
Essential Concepts – Conclusions and summary
The important points of this chapter are:
Academic simplifications often omit important details for the sake of clarity
All connections have impedance
Connection impedance can cause voltage variance across P&G
Phase errors between receivers can exist even when driven by a common signal
Capacitors includes ESL, ESR, self resonance, leakage, and voltage variance issues
Resistors include ESL, EPC, and thermally generated noise
High impedance resistors are susceptible to error due to environment issues
Inductors include ESR, EPC, and self resonance issues
Voltage and Current sources can have both impedance and noise components
Switches have contact bounce, inductance, and variable contact resistance
Op-Amps have limitations including: input/output voltage range, bandwidth, offset, output current, additive noise, and others
Comparators have limitations in voltage range, input offset, response time and others.
Power-ground instability can corrupt logic
Asynchronous logic can create unpredictable behavior
Ground based logic can be limited by RC loading that degenerates signal rise time and amplitude
Digital devices often create radiated emissions
Signals in one circuit can couple to another circuit without direct connection.
Nothing is ideal
The intent of this chapter is to build awareness of the limitations and non ideal nature of electronics. Many engineers build awareness due to device failures from many of the items described here. Learning from experience is invaluable, but failure analysis is not the most efficient use of time or effort. Moving forward, the techniques presented in this book address these limitations while developing design solutions proven to work in real world applications.
Ceramic Capacitor: C0G, X7R, Y5V, NP0, etc.—Electronics Notes
Here’s What Makes MLCC Dielectrics Different, Kemet Corporation
High Reliability Capacitors—When the Mission Just Can’t Fail, 2017, Wilmer Companioni, Kemet Corporation
Measurement of Voltage Noise in Chemical Batteries, Boggs, Doak, Walls, 1995, IEEE International Frequency Control Symposium
Cascode Current Sources - Chapter 4, Analysis and Design of Analog Integrated Circuits, 5th ed. Gray, Hurst, Lewis, Meyer, John Wiley & Sons, ISBN: 978-0-470-24599-6
Get Applied Embedded Electronics now with the O’Reilly learning platform.
O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.