ARM System Developer's Guide

CHAPTER 12

CACHES

12.1. THE MEMORY HIERARCHY AND CACHE MEMORY

12.1.1. Caches and Memory Management Units

12.2. CACHE ARCHITECTURE

12.2.1. Basic Architecture of a Cache Memory

12.2.2. Basic Operation of a Cache Controller

12.2.3. The Relationship between Cache and Main Memory

12.2.4. Set Associativity

12.2.5. Write Buffers

12.2.6. Measuring Cache Efficiency

12.3. CACHE POLICY

12.3.1. Write Policy—Writeback or Writethrough

12.3.2. Cache Line Replacement Policies

12.3.3. Allocation Policy on a Cache Miss

12.4. COPROCESSOR 15 AND CACHES

12.5. FLUSHING AND CLEANING CACHE MEMORY

12.5.1. Flushing ARM Cached Cores

12.5.2. Cleaning ARM Cached Cores

12.5.3. Cleaning the D-Cache

12.5.4. Cleaning the D-Cache Using Way and Set Index Addressing ...