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Essentials of Computer Organization and Architecture, 6th Edition

Name: Essentials of Computer Organization and Architecture, 6th Edition
Author: Linda Null
ISBN: 9781284259445

by Linda Null

April 2023

Intermediate to advanced

750 pages

33h 54m

English

Jones & Bartlett Learning

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Cover
Title Page
Copyright Page
Dedication Page
Contents
Preface
CHAPTER 1 Introduction
1.1 Overview
1.2 Computer Systems
1.2.1 The Main Components of a Computer1.2.2 System Components1.2.3 Classification of Computing Devices
1.3 An Example System: Wading Through the Jargon

1.4 Standards Organizations
1.5 Historical Development
1.5.1 Generation Zero: Mechanical Calculating Machines (1642–1945)1.5.2 The First Generation: Vacuum Tube Computers (1945–1953)1.5.3 The Second Generation: Transistorized Computers (1954–1965)1.5.4 The Third Generation: Integrated Circuit Computers (1965–1980)1.5.5 The Fourth Generation: VLSI Computers (1980–????)1.5.6 Moore’s Law
1.6 The Computer Level Hierarchy
1.7 Cloud Computing: Computing as a Service
1.8 The Fragility of the Internet
1.9 The von Neumann Model
1.10 Non–von Neumann Models
1.11 Parallel Processors and Parallel Computing
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
CHAPTER 2 Data Representation in Computer Systems
2.1 Introduction
2.2 Positional Numbering Systems
2.3 Converting Between Bases
2.3.1 Converting Unsigned Whole Numbers2.3.2 Converting Fractions2.3.3 Converting Between Power-of-2 Radices
2.4 Signed Integer Representation
2.4.1 Signed Magnitude2.4.2 Complement Systems2.4.3 Excess-M Representation for Signed Numbers2.4.4 Unsigned Versus Signed Numbers2.4.5 Computers, Arithmetic, and Booth’s Algorithm2.4.6 Carry Versus Overflow2.4.7 Binary Multiplication and Division Using Shifting
2.5 Floating-Point Representation
2.5.1 A Simple Model2.5.2 Floating-Point Arithmetic2.5.3 Floating-Point Errors2.5.4 The IEEE-754 Floating-Point Standard2.5.5 Range, Precision, and Accuracy2.5.6 Additional Problems with Floating-Point Numbers
2.6 Character Codes
2.6.1 Binary-Coded Decimal2.6.2 EBCDIC2.6.3 ASCII2.6.4 Unicode
2.7 Error Detection and Correction
2.7.1 Cyclic Redundancy Check2.7.2 Hamming Codes
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
CHAPTER 3 Boolean Algebra and Digital Logic
3.1 Introduction
3.2 Boolean Algebra
3.2.1 Boolean Expressions3.2.2 Boolean Identities3.2.3 Simplification of Boolean Expressions3.2.4 Complements3.2.5 Representing Boolean Functions
3.3 Logic Gates
3.3.1 Symbols for Logic Gates3.3.2 Universal Gates3.3.3 Multiple Input Gates
3.4 Karnaugh Maps
3.4.1 Introduction3.4.2 Description of Kmaps and Terminology3.4.3 Kmap Simplification for Two Variables3.4.4 Kmap Simplification for Three Variables3.4.5 Kmap Simplification for Four Variables3.4.6 Don’t Care Conditions3.4.7 Summary
3.5 Digital Components
3.5.1 Digital Circuits and Their Relationship to Boolean Algebra3.5.2 Integrated Circuits3.5.3 Putting It All Together: From Problem Description to Circuit
3.6 Combinational Circuits
3.6.1 Basic Concepts3.6.2 Examples of Typical Combinational Circuits
3.7 Sequential Circuits
3.7.1 Basic Concepts3.7.2 Clocks3.7.3 Flip-Flops3.7.4 Finite-State Machines3.7.5 Examples of Sequential Circuits3.7.6 An Application of Sequential Logic: Convolutional Coding and Viterbi Detection
3.8 Designing Circuits
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
CHAPTER 4 MARIE: An Introduction to a Simple Computer
4.1 Introduction
4.2 CPU Basics and Organization
4.2.1 The Registers4.2.2 The ALU4.2.3 The Control Unit
4.3 The Bus
4.4 Clocks
4.5 The Input/Output Subsystem
4.6 Memory Organization and Addressing
4.7 MARIE
4.7.1 The Architecture4.7.2 Registers and Buses4.7.3 Instruction Set Architecture4.7.4 Register Transfer Notation
4.8 Instruction Processing
4.8.1 The Fetch–Decode–Execute Cycle4.8.2 Interrupts and the Instruction Cycle4.8.3 MARIE’s I/O
4.9 A Simple Program
4.10 A Discussion on Assemblers
4.10.1 What Do Assemblers Do?4.10.2 Why Use Assembly Language?
4.11 Extending Our Instruction Set
4.12 A Discussion on Decoding: Hardwired Versus Microprogrammed Control
4.12.1 Machine Control4.12.2 Hardwired Control4.12.3 Microprogrammed Control
4.13 Real-World Examples of Computer Architectures
4.13.1 Intel Architectures4.13.2 MIPS Architectures
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
True or False
CHAPTER 5 A Closer Look at Instruction Set Architectures
5.1 Introduction
5.2 Instruction Formats
5.2.1 Design Decisions for Instruction Sets5.2.2 Little Versus Big Endian5.2.3 Internal Storage in the CPU: Stacks Versus Registers5.2.4 Number of Operands and Instruction Length5.2.5 Expanding Opcodes
5.3 Instruction Types
5.3.1 Data Movement5.3.2 Arithmetic Operations5.3.3 Boolean Logic Instructions5.3.4 Bit Manipulation Instructions5.3.5 Input/Output Instructions5.3.6 Instructions for Transfer of Control5.3.7 Special-Purpose Instructions5.3.8 Instruction Set Orthogonality
5.4 Addressing
5.4.1 Data Types5.4.2 Address Modes
5.5 Instruction Pipelining
5.6 Real-World Examples of ISAs
5.6.1 Intel5.6.2 MIPS5.6.3 Java Virtual Machine5.6.4 ARM
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
True or False
CHAPTER 6 Memory
6.1 Introduction
6.2 Types of Memory
6.3 The Memory Hierarchy
6.3.1 Locality of Reference
6.4 Cache Memory
6.4.1 Cache Mapping Schemes6.4.2 Replacement Policies6.4.3 Effective Access Time and Hit Ratio6.4.4 When Does Caching Break Down?6.4.5 Cache Write Policies6.4.6 Instruction and Data Caches6.4.7 Levels of Cache
6.5 Virtual Memory
6.5.1 Paging6.5.2 Effective Access Time Using Paging6.5.3 Putting It All Together: Using Cache, TLBs, and Paging6.5.4 Advantages and Disadvantages of Paging and Virtual Memory6.5.5 Segmentation6.5.6 Paging Combined with Segmentation
6.6 Real-World Examples of Memory Management
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
CHAPTER 7 Input/Output Systems
7.1 Introduction
7.2 I/O and Performance
7.3 Amdahl’s Law
7.4 I/O Architectures
7.4.1 I/O Control Methods7.4.2 Character I/O Versus Block I/O7.4.3 I/O Bus Operation7.4.4 I/O Buses and Interfaces
7.5 Data Transmission Modes
7.5.1 Parallel Data Transmission7.5.2 Serial Data Transmission
7.6 Disk Technology
7.6.1 Hard Disk Drives7.6.2 Solid-State Drives
7.7 Optical Disks
7.7.1 CD-ROM7.7.2 DVD7.7.3 Blue-Violet Laser Discs
7.8 RAID
7.8.1 RAID Level 07.8.2 RAID Level 17.8.3 RAID Level 27.8.4 RAID Level 37.8.5 RAID Level 47.8.6 RAID Level 57.8.7 RAID Level 67.8.8 RAID DP7.8.9 Hybrid RAID Systems
7.9 The Future of Data Storage
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
CHAPTER 8 Alternative Architectures
8.1 Introduction
8.2 RISC Machines
8.3 Flynn’s Taxonomy
8.4 Parallel and Multiprocessor Architectures
8.4.1 Superscalar and VLIW8.4.2 Vector Processors8.4.3 Interconnection Networks8.4.4 Shared Memory Multiprocessors8.4.5 Distributed Computing
8.5 Alternative Parallel Processing Approaches
8.5.1 Dataflow Computing8.5.2 Neural Networks8.5.3 Systolic Arrays
8.6 Quantum Computing
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
CHAPTER 9 Topics in Embedded Systems
9.1 Introduction
9.2 An Overview of Embedded Hardware
9.2.1 Off-the-Shelf Embedded System Hardware9.2.2 Configurable Hardware9.2.3 Custom-Designed Embedded Hardware
9.3 An Overview of Embedded Software
9.3.1 Embedded Systems Memory Organization9.3.2 Embedded Operating Systems9.3.3 Embedded Systems Software Development
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
CHAPTER 10 Performance Measurement and Analysis
10.1 Introduction
10.2 Computer Performance Equations
10.3 Mathematical Preliminaries
10.3.1 What the Means Mean10.3.2 The Statistics and Semantics
10.4 Benchmarking
10.4.1 Clock Rate, MIPS, and FLOPS10.4.2 Synthetic Benchmarks: Whetstone, Linpack, and Dhrystone10.4.3 Standard Performance Evaluation Corporation Benchmarks10.4.4 Transaction Processing Performance Council Benchmarks10.4.5 System Simulation
10.5 CPU Performance Optimization
10.5.1 Branch Optimization10.5.2 Use of Good Algorithms and Simple Code
10.6 Disk Performance
10.6.1 Understanding the Problem10.6.2 Physical Considerations10.6.3 Logical Considerations
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
CHAPTER 11 System Software (Available in the eBook)
11.1 Introduction
11.2 Operating Systems
11.2.1 Operating Systems History11.2.2 Operating System Design11.2.3 Operating System Services
11.3 Protected Environments
11.3.1 Virtual Machines11.3.2 Subsystems and Partitions11.3.3 Protected Environments and the Evolution of Systems Architectures
11.4 Programming Tools
11.4.1 Assemblers and Assembly11.4.2 Link Editors11.4.3 Dynamic Link Libraries11.4.4 Compilers11.4.5 Interpreters
11.5 Java: All of the Above
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
CHAPTER 12 Network Organization and Architecture (Available in the eBook)
12.1 Introduction
12.2 Early Business Computer Networks
12.3 Early Academic and Scientific Networks: The Roots and Architecture of the Internet
12.4 Network Protocols I: ISO/OSI Protocol Unification
12.4.1 A Parable12.4.2 The OSI Reference Model
12.5 Network Protocols II: TCP/IP Network Architecture
12.5.1 The IP Layer for Version 412.5.2 The Trouble with IP Version 412.5.3 Transmission Control Protocol12.5.4 The TCP Protocol at Work12.5.5 IP Version 6
12.6 Network Organization
12.6.1 Physical Transmission Media12.6.2 Interface Cards12.6.3 Repeaters12.6.4 Hubs12.6.5 Switches12.6.6 Bridges and Gateways12.6.7 Routers and Routing
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
CHAPTER 13 Selected Storage Systems and Interfaces (Available in the eBook)
13.1 Introduction
13.2 SCSI Architecture
13.2.1 “Classic” Parallel SCSI13.2.2 The SCSI Architecture Model-3
13.3 Internet SCSI
13.4 Storage Area Networks
13.5 Other I/O Connections
13.5.1 Parallel Buses: XT to ATA13.5.2 Serial ATA and Serial Attached SCSI13.5.3 Peripheral Component Interconnect13.5.4 A Serial Interface: USB
13.6 Cloud Storage
Chapter Summary
Further Reading
References
Review of Essential Terms and Concepts
Exercises
APPENDIX A Data Structures and the Computer (Available in the eBook)
A.1 Introduction
A.2 Fundamental Structures
A.2.1 ArraysA.2.2 Queues and Linked ListsA.2.3 Stacks
A.3 Trees
A.4 Network Graphs
Summary
Further Reading
References
Exercises
Glossary
Answers and Hints for Selected Exercises
Index

Content preview from Essentials of Computer Organization and Architecture, 6th Edition

5.2 INSTRUCTION FORMATS

We know that a machine instruction has an opcode and zero or more operands. We saw in Chapter 4 that MARIE had an instruction length of 16 bits and could have, at most, one operand. Encoding an instruction set can be done in a variety of ways. Architectures are differentiated from one another by the number of bits allowed per instruction (16, 32, and 64 are the most common), by the number of operands allowed per instruction, and by the types of instructions and data each can process. More specifically, instruction sets are differentiated by the following features:

Operand storage (data can be stored in a stack structure or in registers or both)
Number of explicit operands per instruction (zero, one, two, and three being ...

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Essentials of Computer Organization and Architecture, 5th Edition

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ISBN: 9781284259445

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Essentials of Computer Organization and Architecture, 6th Edition

by Linda Null

5.2 INSTRUCTION FORMATS

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