Handbook of Cleaning for Semiconductor Manufacturing: Fundamentals and Applications

Chapter 7

Cleaning Challenges of High-k/Metal Gate Structures

Muhammad M. Hussain1, Denis Shamiryan2, Vasile Paraschiv2, Kenichi Sano3, and Karen A. Reinhardt4

1Electrical Engineering Department, King Abdullah University of Science and Technology (KAUST) Thuwal, Saudi Arabia

2IMEC, Leuven, Belgium

3Silicon Light Machines, San Jose, California, USA

4Cameo Consulting, San Jose, California, USA

Abstract

High-κ/metal gates are used as transistors for advanced logic applications to improve speed and eliminate electrical issues associated with polySi and SiO2 gates. Various integration schemes are possible and will be discussed, such as dual gate, gate-first, and gate-last, both of which require specialized cleaning and etching steps. Specific areas of discussion will include cleaning and conditioning of the silicon surface, forming a high-quality chemical oxide, removal of the high-κ dielectric with selectivity to the SiO2 layer, cleaning and residue removal after etching, and prevention of galvanic corrosion during cleaning.

Keywords: high-κ/metal gate, metal gate electrode, dual metal gate, high-κ gate dielectrics, gate-first, gate-last, high-κ removal, interfacial oxide, chemical oxide, galvanic corrosion

7.1 Introduction and Overview of High-κ/Metal Gate Surface Preparation

Reducing dimensions of a metal oxide semiconductor field effect transistor (MOSFET) requires a dielectric to replace conventional SiO2 to accommodate the low voltage with low leakage current. The need to maintain ...