MPI
Abstract
Discusses MPI on Knights Landing, which has the same interfaces as on Intel Xeon processor based systems. Discusses how the characteristics of hybrid MPI/OpenMP performance may require tuning as the optimal balance of MPI ranks and OpenMP threads may vary.
Keywords
MIC architecture; Xeon Phi; MPI; Message passing interface; MPI rank; Offload; Hyperthreading; PGAS; OpenSHMEM; ITAC; MPS; PAPI
Internode Parallelism
Most of this book focuses on intranode parallelism, while this chapter, Message Passing Interface (MPI), and Chapter 16, Partitioned Global Address Space (PGAS), focus on internode parallelism. Parallelism ...
Get Intel Xeon Phi Processor High Performance Programming, 2nd Edition now with the O’Reilly learning platform.
O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.