The Designer's Guide to VHDL, 2nd Edition

16 Guards and Blocks

In this chapter we look at a number of closely related topics. First, we discuss a new kind of resolved signal called a guarded signal. We see how we can disconnect drivers from such signals. Next, we introduce the idea of blocks in a VHDL design. We show how blocks and guarded signals work together with guards and guard expressions to cause automatic disconnection of drivers. Finally, we discuss blocks as a mechanism for describing a hierarchical structure within an architecture.

16.1 Guarded Signals and Disconnection

In Chapter 11 we saw how we can use resolved signals that include values such as ‘Z’ for modeling high-impedance outputs. However, if we are modeling at a higher level of abstraction, we may wish to use ...