The Designer's Guide to VHDL, 2nd Edition

19 Case Study: Queuing Networks

In this final case study, we develop a suite of VHDL entities for building queuing networks. These are used to model systems at a very high level of abstraction and to gain system performance estimates before proceeding to more detailed design. Our implementation of the queuing network entities illustrates the use of abstract data types and file input/output.

19.1 Queuing Network Concepts

In all of the examples we have considered so far in this book, our main concern has been the correctness of the design. We have written models in VHDL and simulated them to verify that they correctly implement the required behavior. In our first chapter, we also mentioned performance analysis as a motivation for simulation. ...