July 2015
Intermediate to advanced
600 pages
17h 41m
English
Content preview from Trends in Digital Signal Processing
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May 28, 2015 16:12 PSP Book - 9in x 6in 02-Yong-Ching-Lim-c02
Chapter 2
A Review on Time-Interleaved
Analog-to-Digital Converters and
Mismatch Compensation Techniques
Saihua Xu and Yong Ching Lim
School of Electrical and Electronic Engineering, Nanyang Technological University,
50 Nanyang Avenue, Singapore, 639798, Singapore
shxu@ntu.edu.sg, elelimyc@pmail.ntu.edu.sg
Time interleaving a parallel array of slow analog-to-digital con-
verters (ADCs) is an effective approach to achieve high sampling
rate within a given process technology. The resulting system is
a time-interleaved ADC (TIADC). In this chapter, we first review
the parallel architecture of a TIADC ...