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Efficient C++ Performance Programming Techniques by David Mayhew, Dov Bulka

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Cache Thrash

One of the interesting effects of having a cache in a multiprocessor system is the effect of cache coherency protocols on cache performance. A cache coherency protocol is a mechanism employed by memory/cache controllers that maintains a coherent view of memory across a number of what would otherwise be unassociated caches. The problem is simple: processor A wants to write to memory location 100 and processor B wants to read from memory location 100. If B has previously read from location 100 and has a copy of it in its cache then another read will not go out onto the system bus to refetch it. This is the behavior you want if the processor is to go fast. However, if processor A has written a new value to location 100 between the time ...

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