April 2011
Intermediate to advanced
384 pages
8h 13m
English
Content preview from The Definitive Guide to the ARM Cortex-M3
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APPENDIX C Cortex-M3 Exceptions Quick Reference
Exception Types and Enables
Table C.1 Quick Summary of Cortex-M3 Exception Types and Their Priority Configurations
Stack Contents After Exception Stacking
Table C.2 Exception Stack Frame
| Address | Data | Push Order |
| Old SP (N) -> | (Previously pushed data) | - |
| (N-4) | PSR | 2 |
| (N-8) | PC | 1 |
| (Nv12) | LR | 8 |
| (N-16) | R12 | 7 |
| (N-20) | R3 | 6 |
| (N-24) | R2 | 5 |
| (N-28) | R1 | 4 |
| New SP (N-32) -> | R0 | 3 |
Note: If double word stack alignment feature is used and the SP was not double word aligned when the exception occured, the stack frame top might begin at ((OLD_SP-4) AND OXFFFFFFF8), and the rest of the tabe moves one word down.
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