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The Definitive Guide to the ARM Cortex-M3 by Joseph Yiu

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APPENDIX C Cortex-M3 Exceptions Quick Reference

Exception Types and Enables

Table C.1 Quick Summary of Cortex-M3 Exception Types and Their Priority Configurations

image

Stack Contents After Exception Stacking

Table C.2 Exception Stack Frame

AddressDataPush Order
Old SP (N) ->(Previously pushed data)-
(N-4)PSR2
(N-8)PC1
(Nv12)LR8
(N-16)R127
(N-20)R36
(N-24)R25
(N-28)R14
New SP (N-32) ->R03

Note: If double word stack alignment feature is used and the SP was not double word aligned when the exception occured, the stack frame top might begin at ((OLD_SP-4) AND OXFFFFFFF8), and the rest of the tabe moves one word down.

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