14Multicore Navigator

14.1 Introduction

The Multicore Navigator, also referred to as simply the Navigator, provides a high‐speed packet data transfer to enhance CorePac to accelerator/peripheral data movements, core‐to‐core data movements, inter‐core communication and synchronisation without loading the CorePacs. To achieve this, the Navigator architecture is built with two main components, the hardware Queue Manager Subsystem (QMSS) and the Packet DMA engine (PKDMA) which is similar to the EDMA (Enhanced Direct Memory Access) engine covered in Chapter 8. Figure 14.1 and Figure 14.2 show the locations of the Navigators for both the KeyStone I and the KeyStone II, respectively.

Figure 14.1 Functional block diagram for the C6678 [1].

Figure 14.2 Functional ...

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