October 2010
Intermediate to advanced
416 pages
10h 31m
English
book
Power Integrity for I/O Interfaces: With Signal Integrity/Power Integrity Co-Design
by Vishram S. Pandit, Woong Hwan Ryu, Myoung Joon Choi
Content preview from Power Integrity for I/O Interfaces: With Signal Integrity/Power Integrity Co-Design
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Preface
Power Integrity is becoming increasingly important in today’s high-speed digital I/O systems. The cover of this book gives a high-level summary of its system impact. It shows an electronic system with a Printed Circut Board (PCB), a daughter card, and their layer stackup. A driver chip is mounted on the PCB and a receiver chip is mounted on the daughter card. The expanded view of the power grid of the driver chip is also shown. The receiver jitter impact is due to Power Delivery (PD) to signal coupling, and there are different coupling mechanisms. Self impedance response of the PDN at the driver chip shows a resonance in the mid-frequency range. The PD to signal coupling response at the driver chip follows the PDN self impedance response. ...
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