
Study the External Peripherals 53
#define P1DIR (PCB_BASE + 0x50)
#define P1PIN (PCB_BASE + 0x52)
#define P1CON (PCB_BASE + 0x54)
#define P1LTCH (PCB_BASE + 0x56)
#define P2DIR (PCB_BASE + 0x58)
#define P2PIN (PCB_BASE + 0x5A)
#define P2CON (PCB_BASE + 0x5C)
#define P2LTCH (PCB_BASE + 0x5E)
Other things you’ll want to learn about the processor from its databook are:
• Where should the interrupt vector table be located? Does it have to be located
at a specific address in memory? If not, how does the processor know where
to find it?
• What is the format of the interrupt vector table? Is it just a table of pointers to
ISR functions?
• Are there any special interrupts, sometimes called traps, that are generated
within the processor itself? Must an ISR be written to handle each of these?
• How are interrupts enabled and disabled (globally and individually)?
• How are interrupts acknowledged or cleared?
Study the External Peripherals
At this point, you’ve studied every aspect of the new hardware except the exter-
nal peripherals. These are the hardware devices that reside outside the processor
chip and communicate with it by way of interrupts and I/O or memory-mapped
registers.
Begin by making a list of the external peripherals. Depending on your applica-
tion, this list might include LCD or keyboard controllers, A/D converters, network
interface chips, or custom ASICs (Application-Specific Integrated Circuits). ...