
Memory Testing 65
memory tests will not detect this problem. For example, suppose you decided to
use the following test algorithm: write the value 1 to the first location in memory,
verify the value by reading it back, write 2 to the second location, verify the value,
write 3 to the third location, verify, etc. Because each read occurs immediately after
the corresponding write, it is possible that the data read back represents nothing
more than the voltage remaining on the data bus from the previous write. If the
data is read back too quickly, it will appear that the data has been correctly stored
in memory—even though there is no memory chip at the other end of the bus!
To detect a missing memory chip, the test must be altered. Instead of performing
the verification read immediately after the corresponding write, it is desirable to
perform several consecutive writes followed by the same number of consecutive
reads. For example, write the value 1 to the first location, 2 to the second loca-
tion, and 3 to the third location, then verify the data at the first location, the sec-
ond location, etc. If the data values are unique (as they are in the test just
described), the missing chip will be detected: the first value read back will corre-
spond to the last value written (3), rather than the first (1).
Improperly inserted chips
If a memory chip is present but improperly inserted in its socket,